GB9100672D0 - Fabricating a polyemitter bipolar transistor - Google Patents

Fabricating a polyemitter bipolar transistor

Info

Publication number
GB9100672D0
GB9100672D0 GB919100672A GB9100672A GB9100672D0 GB 9100672 D0 GB9100672 D0 GB 9100672D0 GB 919100672 A GB919100672 A GB 919100672A GB 9100672 A GB9100672 A GB 9100672A GB 9100672 D0 GB9100672 D0 GB 9100672D0
Authority
GB
United Kingdom
Prior art keywords
polyemitter
fabricating
bipolar transistor
bipolar
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB919100672A
Other versions
GB2247780A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB9100672D0 publication Critical patent/GB9100672D0/en
Publication of GB2247780A publication Critical patent/GB2247780A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66272Silicon vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
GB9100672A 1990-09-04 1991-01-11 Fabricating a bipolar transistor Withdrawn GB2247780A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900013935A KR920007124A (en) 1990-09-04 1990-09-04 Manufacturing Method of Poly-Emitter Bipolar Transistor

Publications (2)

Publication Number Publication Date
GB9100672D0 true GB9100672D0 (en) 1991-02-27
GB2247780A GB2247780A (en) 1992-03-11

Family

ID=19303215

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9100672A Withdrawn GB2247780A (en) 1990-09-04 1991-01-11 Fabricating a bipolar transistor

Country Status (6)

Country Link
JP (1) JPH0629302A (en)
KR (1) KR920007124A (en)
DE (1) DE4103594A1 (en)
FR (1) FR2666450A1 (en)
GB (1) GB2247780A (en)
IT (1) IT1245092B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4240738A1 (en) * 1992-12-03 1993-08-26 Siemens Ag Bipolar transistor prodn. for long service life - by forming base in surface of substrate, short term temp. adjusting, and forming emitter
JPH09500760A (en) * 1993-07-12 1997-01-21 ナショナル・セミコンダクター・コーポレイション Manufacturing process of semiconductor device with arsenic implanted emitter
KR19980054454A (en) * 1996-12-27 1998-09-25 김영환 Polysilicon Cone Formation Method
US6093613A (en) * 1998-02-09 2000-07-25 Chartered Semiconductor Manufacturing, Ltd Method for making high gain lateral PNP and NPN bipolar transistor compatible with CMOS for making BICMOS circuits
KR100382725B1 (en) * 2000-11-24 2003-05-09 삼성전자주식회사 Method of manufacturing semiconductor device in the clustered plasma apparatus
US7737049B2 (en) 2007-07-31 2010-06-15 Qimonda Ag Method for forming a structure on a substrate and device

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0062725B1 (en) * 1981-04-14 1984-09-12 Deutsche ITT Industries GmbH Method of making an integrated planar transistor
WO1983002314A1 (en) * 1981-12-31 1983-07-07 Chye, Patrick, W. Method for reducing oxygen precipitation in silicon wafers
DE3304642A1 (en) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München INTEGRATED SEMICONDUCTOR CIRCUIT WITH BIPOLAR TRANSISTOR STRUCTURES AND METHOD FOR THEIR PRODUCTION
DE3580206D1 (en) * 1984-07-31 1990-11-29 Toshiba Kawasaki Kk BIPOLAR TRANSISTOR AND METHOD FOR THE PRODUCTION THEREOF.
KR880000483B1 (en) * 1985-08-05 1988-04-07 재단법인 한국전자통신 연구소 Fabricating semiconductor device with polysilicon protection layer during processing
US4693782A (en) * 1985-09-06 1987-09-15 Matsushita Electric Industrial Co., Ltd. Fabrication method of semiconductor device
DE3787110D1 (en) * 1986-03-21 1993-09-30 Siemens Ag Method of manufacturing a bipolar transistor structure for high speed switching.
JPS6353928A (en) * 1986-08-22 1988-03-08 Anelva Corp Dry etching
US4839302A (en) * 1986-10-13 1989-06-13 Matsushita Electric Industrial Co., Ltd. Method for fabricating bipolar semiconductor device
JPS63182860A (en) * 1987-01-26 1988-07-28 Toshiba Corp Semiconductor device and manufacture thereof
JP2654011B2 (en) * 1987-03-31 1997-09-17 株式会社東芝 Method for manufacturing semiconductor device
JPH01157565A (en) * 1987-12-14 1989-06-20 Nec Corp Manufacture of bi-mos integrated circuit device
JPH0736389B2 (en) * 1988-11-10 1995-04-19 三菱電機株式会社 Method for forming electrode wiring of semiconductor device

Also Published As

Publication number Publication date
FR2666450B1 (en) 1993-02-26
DE4103594A1 (en) 1992-03-05
GB2247780A (en) 1992-03-11
ITMI910068A0 (en) 1991-01-11
KR920007124A (en) 1992-04-28
JPH0629302A (en) 1994-02-04
IT1245092B (en) 1994-09-13
ITMI910068A1 (en) 1992-07-11
FR2666450A1 (en) 1992-03-06

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)