KR900017153A - 반도체 장치 및 그 제조방법 - Google Patents
반도체 장치 및 그 제조방법 Download PDFInfo
- Publication number
- KR900017153A KR900017153A KR1019900005995A KR900005995A KR900017153A KR 900017153 A KR900017153 A KR 900017153A KR 1019900005995 A KR1019900005995 A KR 1019900005995A KR 900005995 A KR900005995 A KR 900005995A KR 900017153 A KR900017153 A KR 900017153A
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- Prior art keywords
- metal plate
- leads
- semiconductor device
- semiconductor
- semiconductor pellet
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims description 27
- 238000004519 manufacturing process Methods 0.000 title claims 2
- 229920005989 resin Polymers 0.000 claims description 7
- 239000011347 resin Substances 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims 32
- 239000008188 pellet Substances 0.000 claims 13
- 239000000758 substrate Substances 0.000 claims 5
- 239000011810 insulating material Substances 0.000 claims 3
- 238000000034 method Methods 0.000 claims 2
- 238000007747 plating Methods 0.000 claims 2
- 230000000903 blocking effect Effects 0.000 claims 1
- 239000003822 epoxy resin Substances 0.000 claims 1
- 239000011521 glass Substances 0.000 claims 1
- 239000012212 insulator Substances 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 229920000647 polyepoxide Polymers 0.000 claims 1
- 229920001187 thermosetting polymer Polymers 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 description 1
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H01L23/495—Lead-frames or other flat leads
- H01L23/49537—Plurality of lead frames mounted in one device
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- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49558—Insulating layers on lead frames, e.g. bridging members
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
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Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명이 QFP구조를 채용하는 수지로 봉한 반도체 장치의 요부평면도,
제2도는 상기 수지로 봉한 반도체장치의 요부 단면도,
제3도 내지 제9도는 상기 수지로 봉한 반도체 장치를 형성 공정마다 나타내는 요부단면도.
Claims (14)
- (a)그 주표면에 확수의 제1및 제2의 본딩패드를 갖는 반도체 펠릿: (b)주면 및 이면을 갖고, 그 주면 중앙부에는 강기 반도체 펠릿이 탑재되어 있고, 상기 반도체 펠릿보다는큰 금속판(c)상기 금속판과는 절연된 상태에서 상기 금속판위에 연재하고 그 일단이 상기 반도체펠릿 근방에 위치하는 복수의 제1리드와 상기 금속판과는 절연된 상태에서 상기 금속판 위에 겹쳐지고, 그 일단이 상기 금속판의 단부 근방에 위치하는 복수의 제2리드; (d)상기 제1리드의 각가의 상기 일단과 상기 제1의 본딩 패드의 각각과를 전기적으로 접속하는 제1의 접속수단: (e)상기 금속판과 상기 제2의 본딩 패드의 각각과를 전기적으로 접속하는 제2의 접속수단; (f)상기 금속판과 상기 제2의 리드의 각각의 상기 일단과를 전기적으로 접속하는 제3의 접속수단과; (g)상기 반도체 펠릿, 상기 금속판과 상기 게1 및 제2리드의 일부를 봉하여 막은 수지로 봉한 후, 그리고 이곳에 상기 금속판은 그 주면에서 이면에 달하는 복수의 관통공으로 이루는 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 제2리드는 전원 전위용의 리드임을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 금속관은 사각형상의 외형을 갖는 것을 특징으로 하는 반도테 장치.
- 제3항에 있어서, 상기 금속판은 코너부에 잘라냄부를 갖는 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 금속판과 상기 제1 및 제2리드와의 사이에는 제1의 절연재가 개재하는 것을 특징으로 하는 반도체 장치.
- 제5항에 있어서, 상기 제1의 절연재는 유리에폭시계수지인 것을 특징으로 하는 반도체 장치.
- 제5항에 있어서, 상기 금속판은 상기 반도체 칩이 탑제되는 부분과 상기 제1 및 제2리드가 겹쳐지는 부분에서 서로 전기적으로 분할되어 있는 것을 특징으로 하는 반도체장치.
- 제5항에 있어서, 상기 제1. 제2, 제3의 접속수단은 금속와이어인 것을 특징으로 하는 반도체 장치.
- 제8항에 있어서, 상기 제1절연막은 상지 금속판에 달하는 복수의 리세스가 있고, 상기 금속 와이어는 이 리세스를 사이에 두고 상기 금속판과 접속되는 것을 특징으로 하는 반도체장치.
- 제5항에 있어서, 상기 금속판에는 그 됫면이 제2절연막으로 덮여있는 것을 특징으로 하는 반도테 장치.
- 제10항에 있어서, 상기 제2절연라은 열경화성 수지라인 것을 특징으로 하는 반도체 장치.
- 제5항에 있어서, 상기 제1절연막은 상기 금속판보다도 큰 외형을 갖는 것을 특징으로 하는 반도체 장치.
- (a)그 주표면에 확수의 제1 및 제2의 본딩패드를 갖는 반도체 펠릿: (b)주면 및 뒷면이 있고, 그 주면 중앙부에는 상기 반도체 펠릿이 탄재되어 있고, 상기 반도체 펠릿 보다는 큰 금속판: (c)그 일단이 상기 반도테 펠릿 근방에 위치하고, 상기 일단의 근방에서만 상기 금속판과 겹치는 확수의 제1리드와, 상기 금속판과는 절연된 상테에서 상기 금속관위에 겹치고, 그 일단이 상기 금속판의 단부 근방에 위치하는 복수의 제2리드; (d)상기 제1리드의 각각의 상기 일단과 상기 제1의 본딩패드의 각각과를 전기적으로 접속하는 제1의 접속수단; (e)상기 금속판과 상기 제2의 본딩패드의 각각과를 전기적으로 접속하는 제2의 접속수단: (f)상기 금속관과 상기 제2리드의 각각의 상기 일단과를 전기적으로 접속하는 제3의 접속수단: 과 (g)상기 반도체 펠릿, 상기 금속판과 상기 제1및 재2리드의 일부뜰 봉하여 막은 수지로 봉한 부로 이루는 것을 특징으로 하는 반도체 장치.
- 반도테 장치의 생산 공정의 단계가 금속판위에 본딩용 리세스를 갖는 절연재를 적풍한 필름기관을 형성하는 공정과, 이 필름기판의 노출하는 금속판 밑의 표면을 피복재로 덮는 공정과 상기 필름기판의 절연재의 본딩용 리세스로 부터 노출하는 금속판위의 표면에 금속도금층을 형성하는 공정과, 상기 필름기판 위의 대략 중앙부에 상기 반도체펠릿을 배치함과 동시에, 이 필름 기판위의 주변에 상기 필름기판의 금속판과 전기적으로 분리된 상태에서 상기 내부리드를 배치하는 공정과, 상기 반도체 펠릿의 외부단자중 전원용 외부단자와 상기 필름기판의 금속판의 중앙부와의 사이, 상기 내부리드중 전원용 내부리드와 상기 금속판의 주변루와의 사이의 각각을 상기 금속도금층을 개재시켜서 본딩 와이어로 전기적으로 접속하는 공정과, 상기 필림기판, 반도체펠릿, 내부리드의 각각을 수지로 봉하여 막는 공정에 의하는 것을 특징으로 하는 반도체 장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10586389A JP2734463B2 (ja) | 1989-04-27 | 1989-04-27 | 半導体装置 |
JP1-105863 | 1989-04-27 |
Publications (2)
Publication Number | Publication Date |
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KR900017153A true KR900017153A (ko) | 1990-11-15 |
KR0154858B1 KR0154858B1 (ko) | 1998-10-15 |
Family
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Application Number | Title | Priority Date | Filing Date |
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KR1019900005995A KR0154858B1 (ko) | 1989-04-27 | 1990-04-27 | 반도체 장치 |
Country Status (3)
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US (2) | US5032895A (ko) |
JP (1) | JP2734463B2 (ko) |
KR (1) | KR0154858B1 (ko) |
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JP2734463B2 (ja) * | 1989-04-27 | 1998-03-30 | 株式会社日立製作所 | 半導体装置 |
JP2784209B2 (ja) * | 1989-06-08 | 1998-08-06 | 新光電気工業株式会社 | 半導体装置 |
JP2799472B2 (ja) * | 1990-05-31 | 1998-09-17 | イビデン株式会社 | 電子部品搭載用基板 |
JP2528991B2 (ja) * | 1990-02-28 | 1996-08-28 | 株式会社日立製作所 | 樹脂封止型半導体装置及びリ―ドフレ―ム |
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-
1989
- 1989-04-27 JP JP10586389A patent/JP2734463B2/ja not_active Expired - Fee Related
-
1990
- 1990-04-18 US US07/510,844 patent/US5032895A/en not_active Expired - Lifetime
- 1990-04-27 KR KR1019900005995A patent/KR0154858B1/ko not_active IP Right Cessation
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1992
- 1992-05-28 US US07/889,397 patent/US5304844A/en not_active Expired - Lifetime
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KR100764405B1 (ko) * | 2000-10-20 | 2007-10-05 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 장치 |
Also Published As
Publication number | Publication date |
---|---|
KR0154858B1 (ko) | 1998-10-15 |
US5032895A (en) | 1991-07-16 |
JP2734463B2 (ja) | 1998-03-30 |
US5304844A (en) | 1994-04-19 |
JPH02285646A (ja) | 1990-11-22 |
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