KR900001652B1 - 반도체 장치 및 그 제조방법 - Google Patents
반도체 장치 및 그 제조방법 Download PDFInfo
- Publication number
- KR900001652B1 KR900001652B1 KR1019860006335A KR860006335A KR900001652B1 KR 900001652 B1 KR900001652 B1 KR 900001652B1 KR 1019860006335 A KR1019860006335 A KR 1019860006335A KR 860006335 A KR860006335 A KR 860006335A KR 900001652 B1 KR900001652 B1 KR 900001652B1
- Authority
- KR
- South Korea
- Prior art keywords
- metal layer
- semiconductor device
- aluminum
- layer
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60-224284 | 1985-10-08 | ||
| JP60224284A JPH0611076B2 (ja) | 1985-10-08 | 1985-10-08 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR870004504A KR870004504A (ko) | 1987-05-09 |
| KR900001652B1 true KR900001652B1 (ko) | 1990-03-17 |
Family
ID=16811357
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019860006335A Expired KR900001652B1 (ko) | 1985-10-08 | 1986-07-31 | 반도체 장치 및 그 제조방법 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4896204A (enExample) |
| JP (1) | JPH0611076B2 (enExample) |
| KR (1) | KR900001652B1 (enExample) |
| DE (1) | DE3634168A1 (enExample) |
| GB (1) | GB2181893B (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2624304B1 (fr) * | 1987-12-04 | 1990-05-04 | Philips Nv | Procede pour etablir une structure d'interconnexion electrique sur un dispositif semiconducteur au silicium |
| DE3815512C2 (de) * | 1988-05-06 | 1994-07-28 | Deutsche Aerospace | Solarzelle und Verfahren zu ihrer Herstellung |
| KR940008936B1 (ko) * | 1990-02-15 | 1994-09-28 | 가부시끼가이샤 도시바 | 고순도 금속재와 그 성질을 이용한 반도체 장치 및 그 제조방법 |
| US5126283A (en) * | 1990-05-21 | 1992-06-30 | Motorola, Inc. | Process for the selective encapsulation of an electrically conductive structure in a semiconductor device |
| JPH07123101B2 (ja) * | 1990-09-14 | 1995-12-25 | 株式会社東芝 | 半導体装置 |
| US5175125A (en) * | 1991-04-03 | 1992-12-29 | Chartered Semiconductor Manufacturing Ltd. Pte | Method for making electrical contacts |
| US5679982A (en) * | 1993-02-24 | 1997-10-21 | Intel Corporation | Barrier against metal diffusion |
| US5382447A (en) * | 1993-12-02 | 1995-01-17 | International Business Machines Corporation | Process for fabricating improved multilayer interconnect systems |
| US5913146A (en) * | 1997-03-18 | 1999-06-15 | Lucent Technologies Inc. | Semiconductor device having aluminum contacts or vias and method of manufacture therefor |
| US6906421B1 (en) * | 1998-01-14 | 2005-06-14 | Cypress Semiconductor Corporation | Method of forming a low resistivity Ti-containing interconnect and semiconductor device comprising the same |
| EP1101837B1 (en) * | 1999-11-22 | 2008-01-09 | STMicroelectronics S.r.l. | Moisture corrosion inhibitor layer for Al-alloy metallization layers for electronic devices and corresponding manufacturing method |
| JP6191587B2 (ja) * | 2014-12-08 | 2017-09-06 | トヨタ自動車株式会社 | 半導体装置 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3866311A (en) * | 1971-06-14 | 1975-02-18 | Nat Semiconductor Corp | Method of providing electrically isolated overlapping metallic conductors |
| JPS52147988A (en) * | 1976-06-03 | 1977-12-08 | Toshiba Corp | Manufacture of semiconductor device |
| US4433004A (en) * | 1979-07-11 | 1984-02-21 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor device and a method for manufacturing the same |
| JPS56105660A (en) * | 1980-01-28 | 1981-08-22 | Nec Corp | Semiconductor device |
| US4471376A (en) * | 1981-01-14 | 1984-09-11 | Harris Corporation | Amorphous devices and interconnect system and method of fabrication |
| DE3140669A1 (de) * | 1981-10-13 | 1983-04-28 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von halbleitervorrichtungen |
| JPS58103168A (ja) * | 1981-12-16 | 1983-06-20 | Fujitsu Ltd | 半導体装置 |
| JPS58137231A (ja) * | 1982-02-09 | 1983-08-15 | Nec Corp | 集積回路装置 |
| JPS58201367A (ja) * | 1982-05-20 | 1983-11-24 | Nec Corp | Mos型半導体装置の製造方法 |
| JPS59501845A (ja) * | 1982-09-30 | 1984-11-01 | アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド | 集積回路のためのアルミニウム−金属シリサイドの相互接続構造及びその製造方法 |
| DE3244461A1 (de) * | 1982-12-01 | 1984-06-07 | Siemens AG, 1000 Berlin und 8000 München | Integrierte halbleiterschaltung mit einer aus einer aluminium/silizium-legierung bestehenden kontaktleiterbahnebene |
| JPS60136337A (ja) * | 1983-12-22 | 1985-07-19 | モノリシツク・メモリ−ズ・インコ−ポレイテツド | 2重層処理においてヒロツク抑制層を形成する方法及びその構造物 |
-
1985
- 1985-10-08 JP JP60224284A patent/JPH0611076B2/ja not_active Expired - Lifetime
-
1986
- 1986-07-31 KR KR1019860006335A patent/KR900001652B1/ko not_active Expired
- 1986-10-01 GB GB8623528A patent/GB2181893B/en not_active Expired
- 1986-10-07 DE DE19863634168 patent/DE3634168A1/de active Granted
-
1988
- 1988-07-25 US US07/224,172 patent/US4896204A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0611076B2 (ja) | 1994-02-09 |
| GB2181893A (en) | 1987-04-29 |
| JPS6284534A (ja) | 1987-04-18 |
| US4896204A (en) | 1990-01-23 |
| KR870004504A (ko) | 1987-05-09 |
| GB8623528D0 (en) | 1986-11-05 |
| GB2181893B (en) | 1989-03-30 |
| DE3634168A1 (de) | 1987-04-16 |
| DE3634168C2 (enExample) | 1991-12-05 |
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