KR890012378A - 실리콘계 보호막을 사용한 반도체 장치의 제조방법 - Google Patents

실리콘계 보호막을 사용한 반도체 장치의 제조방법 Download PDF

Info

Publication number
KR890012378A
KR890012378A KR1019890000609A KR890000609A KR890012378A KR 890012378 A KR890012378 A KR 890012378A KR 1019890000609 A KR1019890000609 A KR 1019890000609A KR 890000609 A KR890000609 A KR 890000609A KR 890012378 A KR890012378 A KR 890012378A
Authority
KR
South Korea
Prior art keywords
protective film
semiconductor device
manufacturing semiconductor
silicon based
based protective
Prior art date
Application number
KR1019890000609A
Other languages
English (en)
Other versions
KR920004517B1 (ko
Inventor
에쯔시 아다찌
히로시 아다찌
오사무 하야시
가즈오 오가하시
Original Assignee
시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 시기 모리야, 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 시기 모리야
Publication of KR890012378A publication Critical patent/KR890012378A/ko
Application granted granted Critical
Publication of KR920004517B1 publication Critical patent/KR920004517B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H01L21/3121—Layers comprising organo-silicon compounds
    • H01L21/3122—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/296—Organo-silicon compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01007—Nitrogen [N]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0101—Neon [Ne]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01018—Argon [Ar]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/95—Multilayer mask including nonradiation sensitive layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

내용 없음.

Description

실리콘계 보호막을 사용한 반도체 장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일 실시예에 의한 본딩패드 형성 공정을 표시하는 반도체 장치의 단면도.
제3도는 응력완충 보호막 표면의 오고 전자분광 스팩트럼을 표시하는 그래프.
제4도는 질소 플라즈마 처리를 행한 응력완충 보호막 표면의 오거 전자분광 스펙트럼을 표시하는 그래프.

Claims (1)

  1. 응력완충 보호막으로서 4불화 탄소 플라즈마로서 에칭되지 않고 또한 불활성 가스에 의한 표면 개질 처리를 실실하는 것에 의하여 산소 플라즈마에 바래어도 크랙이 생기지 않는 막이 되는 내플라즈마성 실리콘계응력완충 보호막을 형성하는 것을 특징으로 하는 실리콘계 보호막을 사용한 반도체 장치의 제조방법.
    ※참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890000609A 1988-01-21 1989-01-20 실리콘계 보호막을 사용한 반도체 장치의 제조방법 KR920004517B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63-11217 1988-01-21
JP63011217A JP2503565B2 (ja) 1988-01-21 1988-01-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR890012378A true KR890012378A (ko) 1989-08-26
KR920004517B1 KR920004517B1 (ko) 1992-06-08

Family

ID=11771799

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890000609A KR920004517B1 (ko) 1988-01-21 1989-01-20 실리콘계 보호막을 사용한 반도체 장치의 제조방법

Country Status (3)

Country Link
US (1) US5023204A (ko)
JP (1) JP2503565B2 (ko)
KR (1) KR920004517B1 (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100238991B1 (ko) * 1997-09-11 2000-04-01 백전호 공기가 주입된 에어모자를 이용한 다용도 안전모자와 헬멧
KR20010082057A (ko) * 2000-02-10 2001-08-29 가네꼬 히사시 반도체장치 및 그 제조방법

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2503565B2 (ja) * 1988-01-21 1996-06-05 三菱電機株式会社 半導体装置の製造方法
KR930001988B1 (ko) * 1988-04-05 1993-03-20 미쓰비시뎅끼 가부시끼가이샤 반도체 봉지용 에폭시 수지조성물
US5483104A (en) * 1990-01-12 1996-01-09 Paradigm Technology, Inc. Self-aligning contact and interconnect structure
US5166771A (en) * 1990-01-12 1992-11-24 Paradigm Technology, Inc. Self-aligning contact and interconnect structure
JPH04233732A (ja) * 1990-08-16 1992-08-21 Motorola Inc 半導体の製造工程で使用するスピン・オン誘電体
JPH04261049A (ja) * 1991-01-31 1992-09-17 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5256587A (en) * 1991-03-20 1993-10-26 Goldstar Electron Co., Ltd. Methods of patterning and manufacturing semiconductor devices
US5086017A (en) * 1991-03-21 1992-02-04 Industrial Technology Research Institute Self aligned silicide process for gate/runner without extra masking
US5393373A (en) * 1991-07-11 1995-02-28 Goldstar Electron Co., Ltd. Methods of patterning and manufacturing semiconductor devices
KR950009740B1 (ko) * 1991-11-12 1995-08-26 금성일렉트론주식회사 메모리 캐패시터 제조방법 및 그 구조
JP2923408B2 (ja) * 1992-12-21 1999-07-26 三菱電機株式会社 高純度シリコーンラダーポリマーの製造方法
JPH0799271A (ja) * 1993-06-16 1995-04-11 Mitsubishi Electric Corp 半導体装置
JP3370806B2 (ja) 1994-11-25 2003-01-27 株式会社半導体エネルギー研究所 Ｍｉｓ型半導体装置の作製方法
US5600151A (en) * 1995-02-13 1997-02-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor device comprising a semiconductor substrate, an element formed thereon, and a stress-buffering film made of a silicone ladder resin
US5474956A (en) * 1995-03-14 1995-12-12 Hughes Aircraft Company Method of fabricating metallized substrates using an organic etch block layer
JPH10330188A (ja) * 1997-05-29 1998-12-15 Kobe Steel Ltd ダイヤモンドの微細加工方法
DE69811296D1 (de) * 1997-07-11 2003-03-20 Bosch Gmbh Robert Erhöhte Haftung der Unterseitenbeschichtung von Flip-Chips
KR100725364B1 (ko) * 2005-09-06 2007-06-07 삼성전자주식회사 반도체 칩 패키지 및 그 제조 방법
JP4357570B2 (ja) * 2008-01-31 2009-11-04 株式会社東芝 磁気記録媒体の製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52127174A (en) * 1976-04-19 1977-10-25 Matsushita Electric Ind Co Ltd Minute patern formation method
JPS56135928A (en) * 1980-03-27 1981-10-23 Fujitsu Ltd Forming method for pattern of silicone resin
JPS60249326A (ja) * 1984-05-25 1985-12-10 Hitachi Ltd パタ−ン形成方法
JPS62247522A (ja) * 1986-04-18 1987-10-28 Fujitsu Ltd 半導体装置の製造方法
JPS62290139A (ja) * 1986-06-09 1987-12-17 Fujitsu Ltd 耐熱樹脂組成物
JPS6314432A (ja) * 1986-07-07 1988-01-21 Nippon Telegr & Teleph Corp <Ntt> パタン形成方法
JPS63107122A (ja) * 1986-10-24 1988-05-12 Fujitsu Ltd 凹凸基板の平坦化方法
JPS63120774A (ja) * 1986-11-07 1988-05-25 Mitsubishi Electric Corp 高純度ＳｉＯ２薄膜形成法
JP2503565B2 (ja) * 1988-01-21 1996-06-05 三菱電機株式会社 半導体装置の製造方法
JPH01307227A (ja) * 1988-06-06 1989-12-12 Showa Denko Kk 微細加工方法
JPH029153A (ja) * 1988-06-28 1990-01-12 Fujitsu Ltd 半導体基板の平坦化処理法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100238991B1 (ko) * 1997-09-11 2000-04-01 백전호 공기가 주입된 에어모자를 이용한 다용도 안전모자와 헬멧
KR20010082057A (ko) * 2000-02-10 2001-08-29 가네꼬 히사시 반도체장치 및 그 제조방법

Also Published As

Publication number Publication date
KR920004517B1 (ko) 1992-06-08
US5023204A (en) 1991-06-11
JPH01185924A (ja) 1989-07-25
JP2503565B2 (ja) 1996-06-05

Similar Documents

Publication Publication Date Title
KR890012378A (ko) 실리콘계 보호막을 사용한 반도체 장치의 제조방법
KR970018137A (ko) 웨이퍼 처리 방법
KR950030212A (ko) 반도체 디바이스 제조용 처리장치
KR920000967A (ko) 질화 규소막의 형성방법
TW200625447A (en) Tensile and compressive stressed materials for semiconductors
KR900002316A (ko) 반도체장치의 제조방법
KR920001620A (ko) 반도체장치 및 그의 제조방법
JPS5674921A (en) Manufacturing method of semiconductor and apparatus thereof
KR890001180A (ko) 세라믹 패키지
WO2002073705A3 (de) Strahlungsemittierendes halbleiterbauelement und verfahren zu dessen herstellung
EP0847079A3 (en) Method of manufacturing an MIS electrode
KR870000767A (ko) 반도체장치 제조방법
KR940001300A (ko) 드라이에칭방법
KR970003794A (ko) 반도체 장치의 소자분리 방법
KR890012363A (ko) 반도체 소자 제조방법
WO2003041123A3 (en) In-line spectroscopy for process monitoring
KR920005271A (ko) 반도체장치의 제조방법
KR960035858A (ko) 실리콘에 테이퍼진 개구부를 형성하기 위한 방법
SE9600524D0 (sv) A method and a device for oxidation of a semiconductor layer of SiC
KR970001597A (ko) H-수지로부터 유도된 실리카와 금의 접착력을 향상시키는 방법
KR970052915A (ko) 반도체 소자의 질화 산화막 형성방법
WO2004014785A3 (de) Verfahren und herstellung wenigstens einer kleinen öffnung in einer schicht auf einem substrat und damit hergestellte bauelemente
KR970053905A (ko) 게이트 전극 및 그 형성방법
KR970063565A (ko) 반도체 장치의 층간 절연막 형성 방법
KR920000124A (ko) 반도체 기판 표면 처리 방법

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030523

Year of fee payment: 12

LAPS Lapse due to unpaid annual fee