DE69811296D1 - Erhöhte Haftung der Unterseitenbeschichtung von Flip-Chips - Google Patents

Erhöhte Haftung der Unterseitenbeschichtung von Flip-Chips

Info

Publication number
DE69811296D1
DE69811296D1 DE69811296T DE69811296T DE69811296D1 DE 69811296 D1 DE69811296 D1 DE 69811296D1 DE 69811296 T DE69811296 T DE 69811296T DE 69811296 T DE69811296 T DE 69811296T DE 69811296 D1 DE69811296 D1 DE 69811296D1
Authority
DE
Germany
Prior art keywords
increased adhesion
flip chips
underside coating
underside
coating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69811296T
Other languages
English (en)
Inventor
George Russel Westby
Peter Borgesen
Von Hessen Wilhelm Prinz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Universal Instruments Corp
Original Assignee
Robert Bosch GmbH
Universal Instruments Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH, Universal Instruments Corp filed Critical Robert Bosch GmbH
Application granted granted Critical
Publication of DE69811296D1 publication Critical patent/DE69811296D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
DE69811296T 1997-07-11 1998-06-30 Erhöhte Haftung der Unterseitenbeschichtung von Flip-Chips Expired - Lifetime DE69811296D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US89372897A 1997-07-11 1997-07-11

Publications (1)

Publication Number Publication Date
DE69811296D1 true DE69811296D1 (de) 2003-03-20

Family

ID=25401979

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69811296T Expired - Lifetime DE69811296D1 (de) 1997-07-11 1998-06-30 Erhöhte Haftung der Unterseitenbeschichtung von Flip-Chips

Country Status (4)

Country Link
US (1) US6518665B1 (de)
EP (1) EP0890981B1 (de)
JP (1) JPH1187404A (de)
DE (1) DE69811296D1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69811296D1 (de) * 1997-07-11 2003-03-20 Bosch Gmbh Robert Erhöhte Haftung der Unterseitenbeschichtung von Flip-Chips
JP2000294692A (ja) * 1999-04-06 2000-10-20 Hitachi Ltd 樹脂封止型電子装置及びその製造方法並びにそれを使用した内燃機関用点火コイル装置
KR101134168B1 (ko) * 2005-08-24 2012-04-09 삼성전자주식회사 반도체 칩 및 그 제조 방법과, 그를 이용한 표시 패널 및그 제조 방법
US7935408B2 (en) * 2007-10-26 2011-05-03 International Business Machines Corporation Substrate anchor structure and method
US8234780B2 (en) * 2008-02-27 2012-08-07 Universal Instruments Corporation Substrate carrier system
US8236615B2 (en) * 2009-11-25 2012-08-07 International Business Machines Corporation Passivation layer surface topography modifications for improved integrity in packaged assemblies
JP2011129669A (ja) * 2009-12-17 2011-06-30 Panasonic Corp 半導体チップ及び該半導体チップを備えた半導体装置
JP2011165938A (ja) * 2010-02-10 2011-08-25 Denso Corp 半導体装置
US9070851B2 (en) 2010-09-24 2015-06-30 Seoul Semiconductor Co., Ltd. Wafer-level light emitting diode package and method of fabricating the same
JP2012256679A (ja) * 2011-06-08 2012-12-27 Elpida Memory Inc 半導体装置及びその製造方法
CN205944139U (zh) 2016-03-30 2017-02-08 首尔伟傲世有限公司 紫外线发光二极管封装件以及包含此的发光二极管模块
US10347592B2 (en) 2016-11-29 2019-07-09 Qualcomm Incorporated Integrated circuit (IC) devices with varying diameter via layer

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS641257A (en) * 1987-06-23 1989-01-05 Fujitsu Ltd Semiconductor device
JP2503565B2 (ja) * 1988-01-21 1996-06-05 三菱電機株式会社 半導体装置の製造方法
JPH03198342A (ja) * 1989-12-26 1991-08-29 Nec Corp 半導体装置の製造方法
JPH04261049A (ja) * 1991-01-31 1992-09-17 Mitsubishi Electric Corp 半導体装置およびその製造方法
JPH05291262A (ja) * 1992-04-07 1993-11-05 Toshiba Corp バンプ電極の形成方法
US5386624A (en) * 1993-07-06 1995-02-07 Motorola, Inc. Method for underencapsulating components on circuit supporting substrates
CN1107979C (zh) * 1995-07-14 2003-05-07 松下电器产业株式会社 半导体器件的电极结构、形成方法及安装体和半导体器件
TW448524B (en) * 1997-01-17 2001-08-01 Seiko Epson Corp Electronic component, semiconductor device, manufacturing method therefor, circuit board and electronic equipment
DE69811296D1 (de) * 1997-07-11 2003-03-20 Bosch Gmbh Robert Erhöhte Haftung der Unterseitenbeschichtung von Flip-Chips
US6075290A (en) * 1998-02-26 2000-06-13 National Semiconductor Corporation Surface mount die: wafer level chip-scale package and process for making the same
US5943597A (en) * 1998-06-15 1999-08-24 Motorola, Inc. Bumped semiconductor device having a trench for stress relief

Also Published As

Publication number Publication date
EP0890981B1 (de) 2003-02-12
EP0890981A1 (de) 1999-01-13
US6518665B1 (en) 2003-02-11
JPH1187404A (ja) 1999-03-30

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Legal Events

Date Code Title Description
8332 No legal effect for de