KR890004420A - 전도 링크 회로 - Google Patents

전도 링크 회로 Download PDF

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Publication number
KR890004420A
KR890004420A KR1019880010127A KR880010127A KR890004420A KR 890004420 A KR890004420 A KR 890004420A KR 1019880010127 A KR1019880010127 A KR 1019880010127A KR 880010127 A KR880010127 A KR 880010127A KR 890004420 A KR890004420 A KR 890004420A
Authority
KR
South Korea
Prior art keywords
link
circuit
insulating layer
link circuit
interconnect level
Prior art date
Application number
KR1019880010127A
Other languages
English (en)
Inventor
해리슨 피셔 프레드릭
Original Assignee
엘리 와이스
아메리칸 텔리폰 앤드 텔레그라프 캄파니
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘리 와이스, 아메리칸 텔리폰 앤드 텔레그라프 캄파니 filed Critical 엘리 와이스
Publication of KR890004420A publication Critical patent/KR890004420A/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음

Description

전도 링크 회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 두 도체레벨 배열의 횡단면도, 제2도는 두 도체레벨 배열의 평면도.

Claims (9)

  1. 상호 연결 레벨은 교차 위치 (예를 들면, 25)에서 하부 상호 연결 레벨위를 횡단하는 상부 상호 연결레벨(예를 들면14)에 의해 옆어진 절연층에 의하여 덮어지고, 복사 에너지의 응용에 의해 비-전도를 제공하는데 적합한 전도링크(예를들면 12)를 갖은 하부 상호연결레벨을 구비하는 고체 회로에 있어서, 에치 저항 마스킹층(예를들면 23)은 최소한 상기 교차위치 위에서 형성되고 하부 상호연결 레벨에서 상기 링크위의 상기 절연층의 두께는 상기 에치 저항 마스킹층 아래에서의 상기 절연층 두께보다 실제로 작은 것을 특징으로 하는 전도링크 회로.
  2. 제1항에 있어서, 상기 링크위의 상기 절연층 두께가 상기 마스킹층 아래에서의 상기 절연층 두께보다 최소25나노미터가 작은 것을 특징으로 하는 전도링크 회로.
  3. 제1항에 있어서, 상기 링크는 금속인 것을 특징으로 하는 전도 링크 회로.
  4. 제3항에 있어서, 상기 링크는 알루미늄인 것을 특징으로 하는 전도 링크 회로.
  5. 제3항에 있어서, 상기 링크는 금인 것을 특징으로 하는 전도 링크 회로.
  6. 제3항에 있어서, 상기 링크는 금속 실리시드를 구비하는 것을 특징으로 하는 전도 링크 회로.
  7. 제6항에 있어서, 상기 링크는 티타늄 실리시드인 것을 특징으로 하는 전도 링크 회로.
  8. 제1항에 있어서, 상기 링크는 도프된 폴리실리콘인 것을 특징으로 하는 전도 링크 회로.
  9. 제1항에 있어서, 상기 절연층은 형광체를 구비하는 유리인 것을 특징으로 하는 전도 링크 회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880010127A 1987-08-12 1988-08-09 전도 링크 회로 KR890004420A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/084,531 US4853758A (en) 1987-08-12 1987-08-12 Laser-blown links
US084,531 1987-08-12

Publications (1)

Publication Number Publication Date
KR890004420A true KR890004420A (ko) 1989-04-21

Family

ID=22185539

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880010127A KR890004420A (ko) 1987-08-12 1988-08-09 전도 링크 회로

Country Status (5)

Country Link
US (1) US4853758A (ko)
EP (1) EP0303396A1 (ko)
JP (2) JPH0646648B2 (ko)
KR (1) KR890004420A (ko)
SG (1) SG44449A1 (ko)

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US5223735A (en) * 1988-09-30 1993-06-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device in which circuit functions can be remedied or changed and the method for producing the same
US5025300A (en) * 1989-06-30 1991-06-18 At&T Bell Laboratories Integrated circuits having improved fusible links
US5062690A (en) * 1989-06-30 1991-11-05 General Electric Company Liquid crystal display with redundant FETS and redundant crossovers connected by laser-fusible links
US5021362A (en) * 1989-12-29 1991-06-04 At&T Bell Laboratories Laser link blowing in integrateed circuit fabrication
JP2579235B2 (ja) * 1990-05-01 1997-02-05 三菱電機株式会社 半導体装置およびその製造方法
US5241212A (en) * 1990-05-01 1993-08-31 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a redundant circuit portion and a manufacturing method of the same
US5960263A (en) * 1991-04-26 1999-09-28 Texas Instruments Incorporated Laser programming of CMOS semiconductor devices using make-link structure
US5420455A (en) * 1994-03-31 1995-05-30 International Business Machines Corp. Array fuse damage protection devices and fabrication method
KR0151383B1 (ko) * 1994-06-16 1998-10-01 문정환 안티퓨즈 구조를 갖는 프로그램 가능한 반도체소자 및 그의 제조방법
US5685995A (en) * 1994-11-22 1997-11-11 Electro Scientific Industries, Inc. Method for laser functional trimming of films and devices
US5650355A (en) * 1995-03-30 1997-07-22 Texas Instruments Incorporated Process of making and process of trimming a fuse in a top level metal and in a step
US5521116A (en) * 1995-04-24 1996-05-28 Texas Instruments Incorporated Sidewall formation process for a top lead fuse
US5589706A (en) * 1995-05-31 1996-12-31 International Business Machines Corp. Fuse link structures through the addition of dummy structures
US5608257A (en) * 1995-06-07 1997-03-04 International Business Machines Corporation Fuse element for effective laser blow in an integrated circuit device
US5729042A (en) * 1995-08-14 1998-03-17 Vanguard International Semiconductor Corporation Raised fuse structure for laser repair
US6004834A (en) * 1995-11-29 1999-12-21 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device having a fuse
JP3402029B2 (ja) * 1995-11-30 2003-04-28 三菱電機株式会社 半導体装置の製造方法
JPH09213804A (ja) * 1996-01-29 1997-08-15 Mitsubishi Electric Corp ヒューズ層を有する半導体装置
US5998759A (en) * 1996-12-24 1999-12-07 General Scanning, Inc. Laser processing
US6025256A (en) * 1997-01-06 2000-02-15 Electro Scientific Industries, Inc. Laser based method and system for integrated circuit repair or reconfiguration
US6057221A (en) * 1997-04-03 2000-05-02 Massachusetts Institute Of Technology Laser-induced cutting of metal interconnect
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JPH11345880A (ja) * 1998-06-01 1999-12-14 Fujitsu Ltd 半導体装置及びその製造方法
US6057180A (en) * 1998-06-05 2000-05-02 Electro Scientific Industries, Inc. Method of severing electrically conductive links with ultraviolet laser output
US6413848B1 (en) * 1998-07-17 2002-07-02 Lsi Logic Corporation Self-aligned fuse structure and method with dual-thickness dielectric
US6300590B1 (en) * 1998-12-16 2001-10-09 General Scanning, Inc. Laser processing
US6323067B1 (en) * 1999-01-28 2001-11-27 Infineon Technologies North America Corp. Light absorption layer for laser blown fuses
US6259151B1 (en) 1999-07-21 2001-07-10 Intersil Corporation Use of barrier refractive or anti-reflective layer to improve laser trim characteristics of thin film resistors
US6225652B1 (en) * 1999-08-02 2001-05-01 Clear Logic, Inc. Vertical laser fuse structure allowing increased packing density
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Also Published As

Publication number Publication date
JPH0646648B2 (ja) 1994-06-15
JPS6471147A (en) 1989-03-16
EP0303396A1 (en) 1989-02-15
US4853758A (en) 1989-08-01
JPH10270566A (ja) 1998-10-09
SG44449A1 (en) 1997-12-19

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