KR880001059A - 전계효과 트랜지스터 제조방법 - Google Patents
전계효과 트랜지스터 제조방법 Download PDFInfo
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- KR880001059A KR880001059A KR870005988A KR870005988A KR880001059A KR 880001059 A KR880001059 A KR 880001059A KR 870005988 A KR870005988 A KR 870005988A KR 870005988 A KR870005988 A KR 870005988A KR 880001059 A KR880001059 A KR 880001059A
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
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- H—ELECTRICITY
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7838—Field effect transistors with field effect produced by an insulated gate without inversion channel, e.g. buried channel lateral MISFETs, normally-on lateral MISFETs, depletion-mode lateral MISFETs
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- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 채널링 효과를 방지하기 위한 이온빔입사 방향에 관하여 반도체 기판의 경사에 의해 이온주입의 종래방법을 설명한 예시도. 제2도는 게이트전극에 관하여 불순물 확산층의 비대칭 구조를 설명하는 단면도. 제3도는 게이트 전극에 관하여 비대칭적으로 형성된 LDD영역과 같이 LDD구조 MOS전계효과 트랜지스터에서 채널세로 방향을 자른 단면에서 불순물 분포의 2차원모의 예시도.
Claims (20)
- 게이트절연막을 개재해서 반도체 기판위에 게이트전극을 형성하고, 마스크로서 상기 게이트전극을 사용한 상기 반도체기판에 이온을 주입하고, 상기 이온주입을 위하여 상기 반도체기판에 대해 이온빔의 방향을 경사시킴에 의해 불순물분포층을 형성하고, 상기 반도체기판 회전에 의해 상기 이온주입단계를 반복하는 공정으로 구성된 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제1항에 있어서, 상기 이온주입의수가 2n(n은 양의 정수)회내일때, 각각의 이온주입을 위한 반도체기판의 회전각은 180°㎝인 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제2항에 있어서, 상기 n이 1인 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제1항에 있어서, 상기 이온주입의 수가 4m회(m은 양의 정수)이면, 각각의 이온 주입을 위한 반도체기판의 회전각은 90°cm인 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제4항에 있어서, 상기 m은 1인것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제1항에 있어서, 이온은 반도체기판이 연속적으로 회전하는 동안 연속적으로 주입되는 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 반도체기판위에 게이트절연막을 형성하고, 상기 게이트절연각 위에 게이트전극을 형성하고, 마스크로서 상기 게이트전극을 사용한 상기 반도체기판에 이온을 주입하고, 상기 이온주입을 위하여 상기 반도체기판에 대해 이온빔의 방향을 경사시킴에 의해 제1불순물 분포층을 형성하고, 상기 반도체기판회전에 의해 상기 이온주입 단계를 반복하고, 상기 반도체기판과 게이트전극위에 절연막을 형성하고, 게이트전극 절연막측벽을 형성하도록, 상기 절연막을 재거하여 게이트전극의 면만남기고, 마스크로서 상기 게이트전극 절연막측벽이 있는 게이트전극을 사용하는 상기 반도체기판에 제2이온주입에 의하거나 상기 반도체기판 표면에 대해서 상기 이온 주입을 위한 이온빔 방사방향의 경사에 의해 상기 제1불순물 분포층에 오우버랩되게 제2불순물분포층을 형성하고, 상기 반도체기판회전에 의해 상기 제2이온 주입단계를 반복하는 공정으로 이루어진것을 특징으로하는 전계효과 트랜지스터 제조방법.
- 제7항에 있어서, 상기 제2불순물 층을 형성한후 열처리 공정을 행하는 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제7항에 있어서, 상기이온주입의 수가 2n회(n은 양의 정수)내일때, 각각의 이온 주입을 위한 반도체기판의 회전각은 108°cm인 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제9항에 있어서, 상기 n이 1인것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제7항에 있어서, 상기 이온주입의 수가 4m회(m은 양의 정수)이면, 각각의 이온주입을 위한 반도체기판의 회전각은 90°cm인 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제11항에 있어서, 상기 m은 1인 것을 특징으로하는 전계효과 트랜지스터 제조방법.
- 제7항에 있어서, 이온을 반도체기판이 연속적으로 회전하는 동안, 연속적으로 주입되는 것을 특징으로하는 전계효과 트랜지스터 제조방법.
- 반도체 기판위에 매립채널층을 형성하고, 게이트절연막을 형성하고, 상기 게이트절연막 위에 게이트전극을 형성하고, 마스크로서 상기 게이트전극을 사용한 상기 매립채널층에 이온을 주입하고, 상기 이온주입을 위하여 상기 반도체기판에 대해 이온빔의 방향을 경사시킴에 의해 상기 매립채널층과 반도체 기판의 경계영역에서 불순물분포층을 형성하고, 상기 반도체기판회전에 의해 상기 제1이온주입을 반복하고, 상기 매립채널층과 게이트전극위에 절연막을 형성하고, 게이트전극 절연막을 형성하도록, 상기 절연막을 제거하여, 게이트전극의 면만남기고, 마스크로서 상기 게이트전극 절연막측벽이 있는 게이트전극을 사용하는 상기 매립채널층에 제2이온주입에 의하거나 상기 매립채널층 표면에 대해서 상기 이온주입을 위한 이온빔의 방향을 경사시킴에 의해 상기 제1불순물 분포층위에 상기 매립채널층의 제1평면상에 도달하는 제2불순물 분포층을 형성하고, 상기 반도체기판회전에 의해 상기 제2이온주입 단계를 반복하는 공정으로 이루어진 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제14항에 있어서,상기 제2불순물층을 형성한후 열처리공정을 행하는 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제14항에 있어서,상기 이온주입의 수가 2n회(n은 양의 정수)내일때, 각각의 이온주입을 위한 반도체기판의 회전각은 180°cm인 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제16항에 있어서,상기 n이 1인것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제14항에 있어서,상기이온주입의 수가 4m회(m은 양의 정수)이면, 각각의 이온 주입을 위한 반도체기판의 회전각은 90°cm인 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제18항에 있어서,상기 m은 1인 것을 특징으로 하는 전계효과 트랜지스터 제조방법.
- 제14항에 있어서,이온은 반도체기관이 연속적으로 회전하는동안, 연속적으로 주입되는 것을 특징으로 하는 전계효과 트랜지스터 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61138558A JPS62293776A (ja) | 1986-06-13 | 1986-06-13 | 半導体装置の製造方法 |
JP?61-138501 | 1986-06-13 | ||
JP?61-138558 | 1986-06-13 | ||
JP138558 | 1986-06-13 | ||
JP138501 | 1986-06-13 | ||
JP61138501A JPS62293773A (ja) | 1986-06-13 | 1986-06-13 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
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KR880001059A true KR880001059A (ko) | 1988-03-31 |
KR900007046B1 KR900007046B1 (ko) | 1990-09-27 |
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KR1019870005988A KR900007046B1 (ko) | 1986-06-13 | 1987-06-13 | 전계효과 트랜지스터 제조방법 |
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US (1) | US4771012A (ko) |
KR (1) | KR900007046B1 (ko) |
Cited By (1)
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KR100773037B1 (ko) * | 2000-08-10 | 2007-11-02 | 유겐가이샤 이즈모기켄 | 기액공급장치 |
Families Citing this family (53)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2668538B2 (ja) * | 1988-02-05 | 1997-10-27 | ヤマハ株式会社 | 集積回路装置の製法 |
US5258319A (en) * | 1988-02-19 | 1993-11-02 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a MOS type field effect transistor using an oblique ion implantation step |
JP2551127B2 (ja) * | 1989-01-07 | 1996-11-06 | 三菱電機株式会社 | Mis型半導体装置およびその製造方法 |
US5270226A (en) * | 1989-04-03 | 1993-12-14 | Matsushita Electric Industrial Co., Ltd. | Manufacturing method for LDDFETS using oblique ion implantion technique |
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-
1987
- 1987-06-12 US US07/061,264 patent/US4771012A/en not_active Ceased
- 1987-06-13 KR KR1019870005988A patent/KR900007046B1/ko not_active IP Right Cessation
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KR100773037B1 (ko) * | 2000-08-10 | 2007-11-02 | 유겐가이샤 이즈모기켄 | 기액공급장치 |
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US4771012A (en) | 1988-09-13 |
KR900007046B1 (ko) | 1990-09-27 |
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