KR970018259A - 반도체 소자의 트랜지스터 제조방법 - Google Patents

반도체 소자의 트랜지스터 제조방법 Download PDF

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Publication number
KR970018259A
KR970018259A KR1019950029989A KR19950029989A KR970018259A KR 970018259 A KR970018259 A KR 970018259A KR 1019950029989 A KR1019950029989 A KR 1019950029989A KR 19950029989 A KR19950029989 A KR 19950029989A KR 970018259 A KR970018259 A KR 970018259A
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South Korea
Prior art keywords
ions
implanted
forming
silicon substrate
semiconductor device
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KR1019950029989A
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English (en)
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KR100212010B1 (ko
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손용선
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김주용
현대전자산업 주식회사
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Priority to KR1019950029989A priority Critical patent/KR100212010B1/ko
Publication of KR970018259A publication Critical patent/KR970018259A/ko
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Publication of KR100212010B1 publication Critical patent/KR100212010B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266Bombardment with radiation with high-energy radiation producing ion implantation using masks

Abstract

본 발명은 반도체 소자의 트랜지스터 제조 방법에 관한 것으로, P형 MOS 트랜지스터의 펀치-쓰루우 문제를 개선하기 위하여 실리콘기판에 GeF3+ 이온을 주입하여 표면 부위를 비정질화시킨 후 저에너지로 11B+ 이온을 주입하여 접합영역을 형성하므로써 소자의 전기적 특성이 향상될 수 있도록 한 반도체 소자의 트랜지스터 제조방법에 관한 것이다.

Description

반도체 소자의 트랜지스터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2A도 내지 제2C도는 본 발명에 따른 반도체 소자의 트랜지스터 제조 방법을 설명하기 위한 소자의 단면도.

Claims (5)

  1. 반도체 소자의 트랜지스터 제조 방법에 있어서, N-웰이 형성된 실리콘기판상에 게이트산화막을 폴리실리콘층을 순차적으로 형성한 후 패터닝하여 게이트전극을 형성하는 단계와, 상기 단계로부터 상기 게이트전극의 양측벽에 산화막 스페이서를 형성한 후 노출된 실리콘기판에 GeF3+ 이온을 주입하여 상기 실리콘기판의 표면부위에 버전질층을 형성하는 단계와, 상기 단계로부터 저에너지를 이용하여 상기 노출된 실리콘기판에 붕소(11B+)이온을 주입하는 단계와, 상기 단계로부터 불소 화합물의 생성을 극소화시키기 위해 열처리를 실시하여 접합영역을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조 방법.
  2. 제1항에 있어서, 상기 주입되는 GeF3+ 이온의 량은 5.0E13 내지 1.0E15 이온/㎠인 것을 특징으로 하는 반도체 소자의 트랜지스터 제조 방법.
  3. 제1항 또는 제2항에 있어서 상기 GeF3+ 이온은 20 내지 150KeV의 에너지로 주입되는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조 방법.
  4. 제1항에 있어서, 상기 주입되는 붕소(11B+) 이온의 량은 5.0E14 내지 5.0E15 이온/㎠인 것을 특징으로 하는 반도체 소자의 트랜지스터 제조 방법.
  5. 제1항 또는 제4항에 있어서, 상기 붕소(11B+) 이온은 1 내지 20KeV의 에너지로 주입되는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조 방법.
KR1019950029989A 1995-09-14 1995-09-14 반도체 소자의 트랜지스터 제조방법 KR100212010B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950029989A KR100212010B1 (ko) 1995-09-14 1995-09-14 반도체 소자의 트랜지스터 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950029989A KR100212010B1 (ko) 1995-09-14 1995-09-14 반도체 소자의 트랜지스터 제조방법

Publications (2)

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KR970018259A true KR970018259A (ko) 1997-04-30
KR100212010B1 KR100212010B1 (ko) 1999-08-02

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100674715B1 (ko) * 2002-12-05 2007-01-25 주식회사 하이닉스반도체 반도체 소자의 트랜지스터 제조 방법
KR100701686B1 (ko) * 2003-12-15 2007-03-29 주식회사 하이닉스반도체 반도체 소자의 제조방법
KR100743620B1 (ko) * 2001-06-15 2007-07-27 주식회사 하이닉스반도체 반도체소자의 저접합 형성방법

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040008633A (ko) * 2002-07-19 2004-01-31 주식회사 하이닉스반도체 피모스트랜지스터의 채널링 방지 방법

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100743620B1 (ko) * 2001-06-15 2007-07-27 주식회사 하이닉스반도체 반도체소자의 저접합 형성방법
KR100674715B1 (ko) * 2002-12-05 2007-01-25 주식회사 하이닉스반도체 반도체 소자의 트랜지스터 제조 방법
KR100701686B1 (ko) * 2003-12-15 2007-03-29 주식회사 하이닉스반도체 반도체 소자의 제조방법

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Publication number Publication date
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