KR870003563A - 반도체장치 - Google Patents
반도체장치 Download PDFInfo
- Publication number
- KR870003563A KR870003563A KR1019860000613A KR860000613A KR870003563A KR 870003563 A KR870003563 A KR 870003563A KR 1019860000613 A KR1019860000613 A KR 1019860000613A KR 860000613 A KR860000613 A KR 860000613A KR 870003563 A KR870003563 A KR 870003563A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor device
- side walls
- side wall
- semiconductor chip
- input
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 의한 반도체장치를 나타내는 것으로 a도는 평면도, b도와 c도는 그의 부분단면도.
제2도는 제1도의 반도체장치의 사시도.
제3도는 제1도의 반도체장치의 등가회로도.
Claims (6)
- 반도체 칩을 장치하기 위한 기부판과, 상기 반도체 칩을 둘러싸도록 상기 기부판상에 배치되는 측면 벽들과, 상기 반도체 칩에 연결되어 상기 측면벽들로부터 외측으로 연장되는 입력리이드편 및 출력이리드편과, 그리고 상기 입력 및 출력리이드편들이 차지한 위치들간의 상기 측면벽으로부터 외측으로 연장되는 적어도 하나의 접지리이드편을 포함하되, 상기 입력 및 출력리이드편들이 차지하는 상기 위치들에 있는 상기 측면벽들은 전기 절연재로 제조되며, 상기 접지리이드편이 차지하는 위치에 있는 상기 측면벽은 상기 측면벽의 내측으로 연장되는 접속단자와 상기 측면벽의 외측으로 연장되는 상기 접지리이드편과 일체로 된 하나의 몸체로서 금속재료 제조되는 것이 특징인 반도체장치.
- 제1항에서, 상기 측면벽들은 장방형 상자의 4측면들로 구성되며, 상기 입력 및 출력리이드편들은 상기 상자의 한쌍의 두 대향 측면들로부터 연장되며 또한 상기 접지리이드편들은 상기 상자의 다른 쌍의 두 대향 측면들로부터 연장되는 것이 특징인 반도체장치.
- 제2항에서, 상기 접지리이드편들이 연장되는 두대향 측면벽들은 내부접속단자 및 외부접지편과 각각 일체로 되는 두 측면벽들을 포함하는 하나의 몸체로서 금속접지단자 블록을 형성하도록 연결 브리지들을 통하여 다른 두 대향하는 측면벽들 위에서 함께 상호연결되는 것이 특징인 반도체장치.
- 제1,2 또는 3항에서, 상기 기부판의 적어도 일부가 열방출을 위한 금속으로 제조되고, 상기 반도체 칩은 상기 금속부분상에 장치되는 것이 특징인 반도체장치.
- 제1항에서, 밀봉금속층은 상기 측면벽들의 전체 상연부표면을 따라 배치되며 또한 캡은 상기 밀봉금속층을 통하여 상기 측벽들상에 고정되는 것이 특징인 반도체장치.
- 제1항에서, 상기 반도체 칩은 초고주파수 갈리움 아세닉 전계효과 트랜지스터인 것이 특징인 반도체장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60015904A JP2509904B2 (ja) | 1985-01-30 | 1985-01-30 | 半導体装置用パツケ−ジ |
JP60-015904 | 1985-01-30 | ||
JP14299485U JPH083011Y2 (ja) | 1985-09-19 | 1985-09-19 | 半導体装置用パツケ−ジ |
JP60-142994 | 1985-09-19 | ||
JP142994 | 1985-09-19 | ||
JP60207503A JPH0812888B2 (ja) | 1985-09-19 | 1985-09-19 | 半導体装置用パツケ−ジ |
JP207503 | 1985-09-19 | ||
JP60-207503 | 1985-09-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR870003563A true KR870003563A (ko) | 1987-04-18 |
KR900001246B1 KR900001246B1 (ko) | 1990-03-05 |
Family
ID=27281186
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019860000613A KR900001246B1 (ko) | 1985-01-30 | 1986-01-30 | 반도체장치 |
Country Status (6)
Country | Link |
---|---|
US (1) | US4825282A (ko) |
EP (1) | EP0190077B1 (ko) |
KR (1) | KR900001246B1 (ko) |
AU (1) | AU564928B2 (ko) |
CA (1) | CA1264380C (ko) |
DE (1) | DE3688205T2 (ko) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5150196A (en) * | 1989-07-17 | 1992-09-22 | Hughes Aircraft Company | Hermetic sealing of wafer scale integrated wafer |
US5067008A (en) * | 1989-08-11 | 1991-11-19 | Hitachi Maxell, Ltd. | Ic package and ic card incorporating the same thereinto |
US5223741A (en) * | 1989-09-01 | 1993-06-29 | Tactical Fabs, Inc. | Package for an integrated circuit structure |
US5126827A (en) * | 1991-01-17 | 1992-06-30 | Avantek, Inc. | Semiconductor chip header having particular surface metallization |
FR2673765A1 (fr) * | 1991-03-05 | 1992-09-11 | Thomson Composants Militaires | Boitier de circuit integre a connexion de puissance. |
US5334874A (en) * | 1991-09-13 | 1994-08-02 | Metzler Richard A | Electronic device package |
US6040625A (en) * | 1997-09-25 | 2000-03-21 | I/O Sensors, Inc. | Sensor package arrangement |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3502786A (en) * | 1967-06-14 | 1970-03-24 | Milton Stoll | Flat pack spacer of low thermal diffusivity |
DE1914442C3 (de) * | 1969-03-21 | 1978-05-11 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Halbleiteranordnung |
US3801938A (en) * | 1972-05-31 | 1974-04-02 | Trw Inc | Package for microwave semiconductor device |
JPS5758783B2 (ko) * | 1973-02-22 | 1982-12-11 | Nippon Electric Co | |
US3946428A (en) * | 1973-09-19 | 1976-03-23 | Nippon Electric Company, Limited | Encapsulation package for a semiconductor element |
US4030001A (en) * | 1975-11-19 | 1977-06-14 | E-Systems, Inc. | Co-planar lead connections to microstrip switching devices |
JPS5834755Y2 (ja) * | 1978-09-18 | 1983-08-04 | 富士通株式会社 | 半導体装置 |
JPS5544755A (en) * | 1978-09-25 | 1980-03-29 | Nec Corp | Semiconductor container |
JPS55120152A (en) * | 1979-03-09 | 1980-09-16 | Fujitsu Ltd | Semiconductor device |
JPS55140251A (en) * | 1979-04-12 | 1980-11-01 | Fujitsu Ltd | Semiconductor device |
JPS5852858A (ja) * | 1981-09-24 | 1983-03-29 | Nec Corp | 半導体装置 |
JPS58190046A (ja) * | 1982-04-30 | 1983-11-05 | Fujitsu Ltd | 半導体装置 |
JPS5999745A (ja) * | 1982-11-29 | 1984-06-08 | Nec Corp | マイクロ波ロ−ノイズ電界効果トランジスタ用容器 |
JPH05240974A (ja) * | 1991-10-04 | 1993-09-21 | Sanyo Electric Co Ltd | 機器の制御装置 |
-
1986
- 1986-01-24 CA CA500274A patent/CA1264380C/en not_active Expired
- 1986-01-28 DE DE8686400160T patent/DE3688205T2/de not_active Expired - Fee Related
- 1986-01-28 EP EP86400160A patent/EP0190077B1/en not_active Expired - Lifetime
- 1986-01-29 AU AU52794/86A patent/AU564928B2/en not_active Ceased
- 1986-01-30 KR KR1019860000613A patent/KR900001246B1/ko not_active IP Right Cessation
-
1988
- 1988-01-25 US US07/147,633 patent/US4825282A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
AU564928B2 (en) | 1987-09-03 |
CA1264380A (en) | 1990-01-09 |
DE3688205D1 (de) | 1993-05-13 |
AU5279486A (en) | 1986-08-28 |
DE3688205T2 (de) | 1993-07-22 |
US4825282A (en) | 1989-04-25 |
KR900001246B1 (ko) | 1990-03-05 |
EP0190077A2 (en) | 1986-08-06 |
CA1264380C (en) | 1990-01-09 |
EP0190077B1 (en) | 1993-04-07 |
EP0190077A3 (en) | 1987-05-06 |
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A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
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FPAY | Annual fee payment |
Payment date: 19930303 Year of fee payment: 4 |
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LAPS | Lapse due to unpaid annual fee |