DE3688205D1 - Packungsstruktur fuer einen halbleiterchip. - Google Patents

Packungsstruktur fuer einen halbleiterchip.

Info

Publication number
DE3688205D1
DE3688205D1 DE8686400160T DE3688205T DE3688205D1 DE 3688205 D1 DE3688205 D1 DE 3688205D1 DE 8686400160 T DE8686400160 T DE 8686400160T DE 3688205 T DE3688205 T DE 3688205T DE 3688205 D1 DE3688205 D1 DE 3688205D1
Authority
DE
Germany
Prior art keywords
semiconductor chip
packing structure
packing
chip
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686400160T
Other languages
English (en)
Other versions
DE3688205T2 (de
Inventor
Jun Fukaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP60015904A external-priority patent/JP2509904B2/ja
Priority claimed from JP60207503A external-priority patent/JPH0812888B2/ja
Priority claimed from JP14299485U external-priority patent/JPH083011Y2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3688205D1 publication Critical patent/DE3688205D1/de
Publication of DE3688205T2 publication Critical patent/DE3688205T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/06Containers; Seals characterised by the material of the container or its electrical properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
DE8686400160T 1985-01-30 1986-01-28 Packungsstruktur fuer einen halbleiterchip. Expired - Fee Related DE3688205T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP60015904A JP2509904B2 (ja) 1985-01-30 1985-01-30 半導体装置用パツケ−ジ
JP60207503A JPH0812888B2 (ja) 1985-09-19 1985-09-19 半導体装置用パツケ−ジ
JP14299485U JPH083011Y2 (ja) 1985-09-19 1985-09-19 半導体装置用パツケ−ジ

Publications (2)

Publication Number Publication Date
DE3688205D1 true DE3688205D1 (de) 1993-05-13
DE3688205T2 DE3688205T2 (de) 1993-07-22

Family

ID=27281186

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686400160T Expired - Fee Related DE3688205T2 (de) 1985-01-30 1986-01-28 Packungsstruktur fuer einen halbleiterchip.

Country Status (6)

Country Link
US (1) US4825282A (de)
EP (1) EP0190077B1 (de)
KR (1) KR900001246B1 (de)
AU (1) AU564928B2 (de)
CA (1) CA1264380C (de)
DE (1) DE3688205T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5150196A (en) * 1989-07-17 1992-09-22 Hughes Aircraft Company Hermetic sealing of wafer scale integrated wafer
US5067008A (en) * 1989-08-11 1991-11-19 Hitachi Maxell, Ltd. Ic package and ic card incorporating the same thereinto
US5223741A (en) * 1989-09-01 1993-06-29 Tactical Fabs, Inc. Package for an integrated circuit structure
US5126827A (en) * 1991-01-17 1992-06-30 Avantek, Inc. Semiconductor chip header having particular surface metallization
FR2673765A1 (fr) * 1991-03-05 1992-09-11 Thomson Composants Militaires Boitier de circuit integre a connexion de puissance.
US5334874A (en) * 1991-09-13 1994-08-02 Metzler Richard A Electronic device package
US6040625A (en) * 1997-09-25 2000-03-21 I/O Sensors, Inc. Sensor package arrangement

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3502786A (en) * 1967-06-14 1970-03-24 Milton Stoll Flat pack spacer of low thermal diffusivity
DE1914442C3 (de) * 1969-03-21 1978-05-11 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Halbleiteranordnung
US3801938A (en) * 1972-05-31 1974-04-02 Trw Inc Package for microwave semiconductor device
JPS5758783B2 (de) * 1973-02-22 1982-12-11 Nippon Electric Co
US3946428A (en) * 1973-09-19 1976-03-23 Nippon Electric Company, Limited Encapsulation package for a semiconductor element
US4030001A (en) * 1975-11-19 1977-06-14 E-Systems, Inc. Co-planar lead connections to microstrip switching devices
JPS5834755Y2 (ja) * 1978-09-18 1983-08-04 富士通株式会社 半導体装置
JPS5544755A (en) * 1978-09-25 1980-03-29 Nec Corp Semiconductor container
JPS55120152A (en) * 1979-03-09 1980-09-16 Fujitsu Ltd Semiconductor device
JPS55140251A (en) * 1979-04-12 1980-11-01 Fujitsu Ltd Semiconductor device
JPS5852858A (ja) * 1981-09-24 1983-03-29 Nec Corp 半導体装置
JPS58190046A (ja) * 1982-04-30 1983-11-05 Fujitsu Ltd 半導体装置
JPS5999745A (ja) * 1982-11-29 1984-06-08 Nec Corp マイクロ波ロ−ノイズ電界効果トランジスタ用容器
JPH05240974A (ja) * 1991-10-04 1993-09-21 Sanyo Electric Co Ltd 機器の制御装置

Also Published As

Publication number Publication date
EP0190077A3 (en) 1987-05-06
DE3688205T2 (de) 1993-07-22
US4825282A (en) 1989-04-25
KR900001246B1 (ko) 1990-03-05
CA1264380A (en) 1990-01-09
EP0190077B1 (de) 1993-04-07
KR870003563A (ko) 1987-04-18
AU5279486A (en) 1986-08-28
AU564928B2 (en) 1987-09-03
CA1264380C (en) 1990-01-09
EP0190077A2 (de) 1986-08-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee