KR890001182A - 외부 테이프 자동 접합(tab) 반도체 패키지 - Google Patents

외부 테이프 자동 접합(tab) 반도체 패키지 Download PDF

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Publication number
KR890001182A
KR890001182A KR1019880006820A KR880006820A KR890001182A KR 890001182 A KR890001182 A KR 890001182A KR 1019880006820 A KR1019880006820 A KR 1019880006820A KR 880006820 A KR880006820 A KR 880006820A KR 890001182 A KR890001182 A KR 890001182A
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South Korea
Prior art keywords
lead
film
semiconductor package
tape
tape film
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KR1019880006820A
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English (en)
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KR970003910B1 (ko
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엠.브라운 케니쓰
제이.한네만 로버트
피.한센 스테펜
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론 마이릭
디지탈 이큅프먼트 코오포레이숀
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Publication of KR890001182A publication Critical patent/KR890001182A/ko
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Publication of KR970003910B1 publication Critical patent/KR970003910B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/86Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01027Cobalt [Co]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Abstract

내용 없음

Description

외부 테이프 자동 접합(TAB) 반도체 패키지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명의 TAB 반도체 패키지의 횡단명도.
제4도는 본 발명의 TAB 반도체 패키지의 다른 실시예를 도시한 투시도.
제5도는 본 발명의 TAB 반도체 패키지에 사용되는 금속필름의 다른 실시예를 도시한 평면도.

Claims (8)

  1. 하나 도는 그 이상의 제조된 반도체 칩을 보호하기 위한 반도체 패키지에 있어서, (a) 각 칩을 밀페하는 하우징과, (b) 각 하우징의 적어도 일부분을 에워싸는 테이프 필름의 일면으로 이루어지는 테이프 자동 접합 테이프의 일면과, (c) 상기 하우징을 통해 칩에 접속되는 내측 리이드 부분과 외부 회로와의 접합을 위해 상기 테이프 필름의 외부 둘레 너머로 연장하는 외측 리이드 부분을 갖는 상기 테이프 필름상의 적어도 하나의 도전성 리이드를 구비하여, 상기 리이드에 의해서 칩이 상기 회로에 전기적으로 접속되도록한 반도체 패키지.
  2. 제1항에 있어서, 상기 리이드 내측 리이드 부분들 주위에 배치되고, 상기 리이드 내측 리이드 부분들의 필름 제거면을 형성하도록 상기 테이프 필름으로부터 이격된 내부 지지링을 추가로 포함하는 반도체 패키지.
  3. 제1항에 있어서, 상기 내부 지지링은 상기 리이드 내측 리이드 부분들의 단부로부터 이격되도록한 반도체 패키지.
  4. 제1항에 있어서, 상기 하우징은 칩이 수용될 공간을 형성하는 돌출 테두리를 갖는 덮개와, 상기 덮개에 부착되는 기부를 구비하도록한 반도체 패키지.
  5. 제2항에 있어서, (a) 상기 하우징은 칩이 수용될 공간을 형성하는 돌출 테두리를 갖는 덮개와, 상기 테두리에 부착되는 기부르 구비하도록 하고, (b) 상기 테이프 필름과 상기 내부 지지링은 상기 리이드 내측 리이드 부분들의 상기 필름 제거면들이 적어도 상기 덮개 테두리에 의해 형성된 영역에 접하게끔 칫수 결정되도록 한 반도체 패키지.
  6. 제1항에 있어서, 상기 리이드 외측 리이드 부분들의 단부들상에 외부 지지링이 배치되도록 하되, 상기 외부 지지리은 상기 테이프 필름으로부터 이격되도록한 반도체 패키지.
  7. 제1항에 있어서, (a) 상기 테이프 필름은 절연 유전체 물질로 이루어지고, (b) 상기 리이들을 지지하는 상기 테이프 필름의 표면에 대항하는 상기 테이프 필름에 도전성 필름이 부착되도록 하며, (c) 상기 리이드들중 적어도 하나는 상기 테이프 필름을 통해 상기 도전성 필름과 전기적 접속을 이루도록한 반도체 패키지.
  8. 제7항에 있어서, 상기 도저성 필름과 전기적 접속을 이루는 상기 리이드들은 경로들에 의해서 서로 접속되도록한 반도체 패키지.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880006820A 1987-06-08 1988-06-08 외부 테이프 자동 접합(tab) 반도체 패키지 KR970003910B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/059,051 US4914741A (en) 1987-06-08 1987-06-08 Tape automated bonding semiconductor package
US059,051 1987-06-08

Publications (2)

Publication Number Publication Date
KR890001182A true KR890001182A (ko) 1989-03-18
KR970003910B1 KR970003910B1 (ko) 1997-03-22

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ID=22020519

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Application Number Title Priority Date Filing Date
KR1019880006820A KR970003910B1 (ko) 1987-06-08 1988-06-08 외부 테이프 자동 접합(tab) 반도체 패키지

Country Status (8)

Country Link
US (1) US4914741A (ko)
EP (1) EP0298607B1 (ko)
JP (1) JPH0191442A (ko)
KR (1) KR970003910B1 (ko)
AU (1) AU608327B2 (ko)
CA (1) CA1279733C (ko)
DE (1) DE3889018T2 (ko)
IL (1) IL86643A (ko)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4843695A (en) * 1987-07-16 1989-07-04 Digital Equipment Corporation Method of assembling tab bonded semiconductor chip package
GB8918482D0 (en) * 1989-08-14 1989-09-20 Inmos Ltd Packaging semiconductor chips
US5156983A (en) * 1989-10-26 1992-10-20 Digtial Equipment Corporation Method of manufacturing tape automated bonding semiconductor package
GB9018763D0 (en) * 1990-08-28 1990-10-10 Lsi Logic Europ Mounting of electronic devices
US5289032A (en) * 1991-08-16 1994-02-22 Motorola, Inc. Tape automated bonding(tab)semiconductor device and method for making the same
US5550323A (en) * 1991-08-28 1996-08-27 Lsi Logic Corporation Mounting of electronic devices
US5831836A (en) * 1992-01-30 1998-11-03 Lsi Logic Power plane for semiconductor device
JPH0637241A (ja) * 1992-07-17 1994-02-10 Mitsubishi Electric Corp 半導体装置およびその製造方法
JPH08288424A (ja) * 1995-04-18 1996-11-01 Nec Corp 半導体装置
US5861662A (en) * 1997-02-24 1999-01-19 General Instrument Corporation Anti-tamper bond wire shield for an integrated circuit
US6114635A (en) * 1998-07-14 2000-09-05 Tfr Technologies, Inc. Chip-scale electronic component package
US6752024B2 (en) * 2001-08-16 2004-06-22 Neil R. Davie Valve packing gland pressure sensing by capacitance measurement
EP1937552B1 (en) * 2005-10-17 2011-06-15 Bell Helicopter Textron Inc. Plasma actuators for drag reduction on wings, nacelles and/or fuselage of vertical take-off and landing aircraft
DE09803664T1 (de) * 2008-07-31 2011-12-22 Bell Helicopter Textron, Inc. System und verfahren für aerodynamische flusssteuerung
KR101435194B1 (ko) 2012-04-26 2014-09-01 주식회사 세아에삽 플럭스 코어드 용접 와이어와 그의 제조 방법 및 장치

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3657805A (en) * 1970-01-02 1972-04-25 Texas Instruments Inc Method of housing semiconductors
US4064552A (en) * 1976-02-03 1977-12-20 Angelucci Thomas L Multilayer flexible printed circuit tape
US4218701A (en) * 1978-07-24 1980-08-19 Citizen Watch Co., Ltd. Package for an integrated circuit having a container with support bars
US4355463A (en) * 1980-03-24 1982-10-26 National Semiconductor Corporation Process for hermetically encapsulating semiconductor devices
US4330790A (en) * 1980-03-24 1982-05-18 National Semiconductor Corporation Tape operated semiconductor device packaging
US4577214A (en) * 1981-05-06 1986-03-18 At&T Bell Laboratories Low-inductance power/ground distribution in a package for a semiconductor chip
JPS582054A (ja) * 1981-06-26 1983-01-07 Fujitsu Ltd 半導体装置
US4472876A (en) * 1981-08-13 1984-09-25 Minnesota Mining And Manufacturing Company Area-bonding tape
US4621278A (en) * 1981-12-30 1986-11-04 Sanyo Electric Co., Ltd. Composite film, semiconductor device employing the same and method of manufacturing
US4466183A (en) * 1982-05-03 1984-08-21 National Semiconductor Corporation Integrated circuit packaging process
US4551746A (en) * 1982-10-05 1985-11-05 Mayo Foundation Leadless chip carrier apparatus providing an improved transmission line environment and improved heat dissipation
DE3512628A1 (de) * 1984-04-11 1985-10-17 Moran, Peter, Cork Packung fuer eine integrierte schaltung
US4674808A (en) * 1985-11-12 1987-06-23 Fairchild Semiconductor Corporation Signal ground planes for tape bonded devices
JPS62143447A (ja) * 1985-12-18 1987-06-26 Hitachi Ltd 配線フイルムおよびそれを用いた半導体装置

Also Published As

Publication number Publication date
AU608327B2 (en) 1991-03-28
EP0298607A3 (en) 1989-09-06
JPH0525390B2 (ko) 1993-04-12
CA1279733C (en) 1991-01-29
KR970003910B1 (ko) 1997-03-22
IL86643A0 (en) 1988-11-30
DE3889018T2 (de) 1994-09-29
EP0298607A2 (en) 1989-01-11
DE3889018D1 (de) 1994-05-19
JPH0191442A (ja) 1989-04-11
AU1745488A (en) 1988-12-08
US4914741A (en) 1990-04-03
IL86643A (en) 1992-02-16
EP0298607B1 (en) 1994-04-13

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