KR20160113989A - 반도체 장치 - Google Patents

반도체 장치 Download PDF

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Publication number
KR20160113989A
KR20160113989A KR1020160034064A KR20160034064A KR20160113989A KR 20160113989 A KR20160113989 A KR 20160113989A KR 1020160034064 A KR1020160034064 A KR 1020160034064A KR 20160034064 A KR20160034064 A KR 20160034064A KR 20160113989 A KR20160113989 A KR 20160113989A
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South Korea
Prior art keywords
active region
channel transistor
local
semiconductor device
active
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English (en)
Korean (ko)
Inventor
다께시 오까가끼
Original Assignee
르네사스 일렉트로닉스 가부시키가이샤
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Publication of KR20160113989A publication Critical patent/KR20160113989A/ko
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90Masterslice integrated circuits
    • H10D84/903Masterslice integrated circuits comprising field effect technology
    • H10D84/907CMOS gate arrays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H01L27/11807
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/853Complementary IGFETs, e.g. CMOS comprising FinFETs
    • H01L21/8238
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Layout of the interconnection structure
    • H01L29/66871
    • H01L29/66878
    • H01L29/7831
    • H01L29/785
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/061Manufacture or treatment of FETs having Schottky gates
    • H10D30/0612Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs
    • H10D30/0614Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs using processes wherein the final gate is made after the completion of the source and drain regions, e.g. gate-last processes using dummy gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/061Manufacture or treatment of FETs having Schottky gates
    • H10D30/0612Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs
    • H10D30/0616Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs using processes wherein the final gate is made before the completion of the source and drain regions, e.g. gate-first processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/611Insulated-gate field-effect transistors [IGFET] having multiple independently-addressable gate electrodes influencing the same channel
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117Shapes of semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90Masterslice integrated circuits
    • H10D84/903Masterslice integrated circuits comprising field effect technology
    • H10D84/907CMOS gate arrays
    • H10D84/909Microarchitecture
    • H10D84/922Microarchitecture relative P to N transistor sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90Masterslice integrated circuits
    • H10D84/903Masterslice integrated circuits comprising field effect technology
    • H10D84/907CMOS gate arrays
    • H10D84/909Microarchitecture
    • H10D84/922Microarchitecture relative P to N transistor sizes
    • H10D84/925Microarchitecture relative P to N transistor sizes for delay time adaptation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10Integrated device layouts
    • H01L2027/11822
    • H01L2027/11825
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H03K5/134Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices with field-effect transistors

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • General Engineering & Computer Science (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
KR1020160034064A 2015-03-23 2016-03-22 반도체 장치 Withdrawn KR20160113989A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2015-059529 2015-03-23
JP2015059529A JP6396834B2 (ja) 2015-03-23 2015-03-23 半導体装置

Publications (1)

Publication Number Publication Date
KR20160113989A true KR20160113989A (ko) 2016-10-04

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Application Number Title Priority Date Filing Date
KR1020160034064A Withdrawn KR20160113989A (ko) 2015-03-23 2016-03-22 반도체 장치

Country Status (6)

Country Link
US (5) US9768172B2 (enExample)
EP (1) EP3073528A1 (enExample)
JP (1) JP6396834B2 (enExample)
KR (1) KR20160113989A (enExample)
CN (2) CN105990339B (enExample)
TW (1) TW201705371A (enExample)

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US10141256B2 (en) * 2016-04-21 2018-11-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and layout design thereof
US9972571B1 (en) * 2016-12-15 2018-05-15 Taiwan Semiconductor Manufacturing Co., Ltd. Logic cell structure and method
WO2018150913A1 (ja) * 2017-02-16 2018-08-23 株式会社ソシオネクスト 半導体集積回路装置
US10325845B2 (en) 2017-06-21 2019-06-18 Qualcomm Incorporated Layout technique for middle-end-of-line
CN109509747B (zh) * 2017-09-15 2021-07-06 联华电子股份有限公司 具有标准单元的集成电路
WO2019116883A1 (ja) * 2017-12-12 2019-06-20 株式会社ソシオネクスト 半導体集積回路装置
US10985272B2 (en) * 2018-11-05 2021-04-20 Samsung Electronics Co., Ltd. Integrated circuit devices including vertical field-effect transistors
US11183576B2 (en) * 2019-02-13 2021-11-23 Micron Technology, Inc. Gate electrode layout with expanded portions over active and isolation regions
US11404415B2 (en) 2019-07-05 2022-08-02 Globalfoundries U.S. Inc. Stacked-gate transistors
CN113517274B (zh) * 2020-07-24 2025-03-25 台湾积体电路制造股份有限公司 半导体器件及其形成方法
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CN105990339A (zh) 2016-10-05
US20190139958A1 (en) 2019-05-09
US20180254276A1 (en) 2018-09-06
US10903214B2 (en) 2021-01-26
CN205645809U (zh) 2016-10-12
CN105990339B (zh) 2021-08-17
US9991263B2 (en) 2018-06-05
US10541240B2 (en) 2020-01-21
US20170373065A1 (en) 2017-12-28
US20160284707A1 (en) 2016-09-29
JP6396834B2 (ja) 2018-09-26
JP2016181537A (ja) 2016-10-13
US20200119017A1 (en) 2020-04-16
US9768172B2 (en) 2017-09-19
EP3073528A1 (en) 2016-09-28
TW201705371A (zh) 2017-02-01

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Patent event date: 20160322

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