KR20110058682A - Ｓｏｉ 기판 및 반도체 장치의 제작 방법 - Google Patents

Ｓｏｉ 기판 및 반도체 장치의 제작 방법 Download PDF

Info

Publication number
KR20110058682A
KR20110058682A KR1020100116003A KR20100116003A KR20110058682A KR 20110058682 A KR20110058682 A KR 20110058682A KR 1020100116003 A KR1020100116003 A KR 1020100116003A KR 20100116003 A KR20100116003 A KR 20100116003A KR 20110058682 A KR20110058682 A KR 20110058682A
Authority
KR
South Korea
Prior art keywords
single crystal
semiconductor layer
crystal semiconductor
substrate
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020100116003A
Other languages
English (en)
Korean (ko)
Inventor
고세이 노다
도시히코 다케우치
마코토 이시카와
Original Assignee
가부시키가이샤 한도오따이 에네루기 켄큐쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 한도오따이 에네루기 켄큐쇼 filed Critical 가부시키가이샤 한도오따이 에네루기 켄큐쇼
Publication of KR20110058682A publication Critical patent/KR20110058682A/ko
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0281—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65—Lateral DMOS [LDMOS] FETs
    • H10D30/657—Lateral DMOS [LDMOS] FETs having substrates comprising insulating layers, e.g. SOI-LDMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H10F10/166—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/17—Photovoltaic cells having only PIN junction potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/139—Manufacture or treatment of devices covered by this subclass using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • H10F77/219—Arrangements for electrodes of back-contact photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • H10F77/219—Arrangements for electrodes of back-contact photovoltaic cells
    • H10F77/223—Arrangements for electrodes of back-contact photovoltaic cells for metallisation wrap-through [MWT] photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/548—Amorphous silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
KR1020100116003A 2009-11-24 2010-11-22 Ｓｏｉ 기판 및 반도체 장치의 제작 방법 Ceased KR20110058682A (ko)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP2009266151 2009-11-24
JP2009266150 2009-11-24
JPJP-P-2009-266151 2009-11-24
JPJP-P-2009-266150 2009-11-24
JP2009266152 2009-11-24
JPJP-P-2009-266152 2009-11-24

Publications (1)

Publication Number Publication Date
KR20110058682A true KR20110058682A (ko) 2011-06-01

Family

ID=44062395

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100116003A Ceased KR20110058682A (ko) 2009-11-24 2010-11-22 Ｓｏｉ 기판 및 반도체 장치의 제작 방법

Country Status (3)

Country Link
US (1) US8815662B2 (https=)
JP (1) JP5706670B2 (https=)
KR (1) KR20110058682A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210148548A (ko) * 2020-05-29 2021-12-08 삼성디스플레이 주식회사 표시 장치 및 그 제조 방법

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5755931B2 (ja) 2010-04-28 2015-07-29 株式会社半導体エネルギー研究所 半導体膜の作製方法、電極の作製方法、２次電池の作製方法、および太陽電池の作製方法
CN102646592B (zh) * 2011-05-03 2014-12-03 京东方科技集团股份有限公司 薄膜场效应晶体管器件及其制备方法
CN102646714A (zh) * 2011-05-16 2012-08-22 京东方科技集团股份有限公司 一种薄膜晶体管、阵列基板及其制备方法
US9553200B2 (en) * 2012-02-29 2017-01-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
JP6056516B2 (ja) * 2013-02-01 2017-01-11 信越半導体株式会社 Ｓｏｉウェーハの製造方法及びｓｏｉウェーハ
US9123673B2 (en) * 2013-03-12 2015-09-01 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer back side processing structure and apparatus
CN104465702B (zh) * 2014-11-03 2019-12-10 深圳市华星光电技术有限公司 Amoled背板的制作方法
JP6292104B2 (ja) * 2014-11-17 2018-03-14 三菱電機株式会社 窒化物半導体装置の製造方法
JP6459948B2 (ja) * 2015-12-15 2019-01-30 株式会社Sumco 半導体エピタキシャルウェーハの製造方法および固体撮像素子の製造方法
KR101879363B1 (ko) * 2017-01-17 2018-08-16 엘지전자 주식회사 태양 전지 제조 방법
JP7103070B2 (ja) * 2018-08-29 2022-07-20 株式会社デンソー 半導体装置の製造方法
JP2022125625A (ja) * 2021-02-17 2022-08-29 信越半導体株式会社 エピタキシャルウェーハの製造方法

Family Cites Families (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4180618A (en) 1977-07-27 1979-12-25 Corning Glass Works Thin silicon film electronic device
EP0191503A3 (en) 1980-04-10 1986-09-10 Massachusetts Institute Of Technology Method of producing sheets of crystalline material
US4496788A (en) 1982-12-29 1985-01-29 Osaka Transformer Co., Ltd. Photovoltaic device
US4633034A (en) 1985-02-08 1986-12-30 Energy Conversion Devices, Inc. Photovoltaic device and method
US5750000A (en) 1990-08-03 1998-05-12 Canon Kabushiki Kaisha Semiconductor member, and process for preparing same and semiconductor device formed by use of same
EP0747935B1 (en) 1990-08-03 2004-02-04 Canon Kabushiki Kaisha Process for preparing an SOI-member
CA2069038C (en) 1991-05-22 1997-08-12 Kiyofumi Sakaguchi Method for preparing semiconductor member
US5424244A (en) 1992-03-26 1995-06-13 Semiconductor Energy Laboratory Co., Ltd. Process for laser processing and apparatus for use in the same
JP3357707B2 (ja) 1993-03-25 2002-12-16 三洋電機株式会社 多結晶半導体膜の製造方法及び薄膜トランジスタの製造方法
JP3360919B2 (ja) 1993-06-11 2003-01-07 三菱電機株式会社 薄膜太陽電池の製造方法，及び薄膜太陽電池
JP2873660B2 (ja) * 1994-01-08 1999-03-24 株式会社半導体エネルギー研究所 半導体集積回路の作製方法
JPH07249574A (ja) * 1994-01-19 1995-09-26 Semiconductor Energy Lab Co Ltd 半導体作製方法および薄膜トランジスタ作製方法
JP3352340B2 (ja) 1995-10-06 2002-12-03 キヤノン株式会社 半導体基体とその製造方法
US5880823A (en) * 1994-06-10 1999-03-09 Lu; Chih-Shun Method and apparatus for measuring atomic vapor density in deposition systems
US5789284A (en) * 1994-09-29 1998-08-04 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating semiconductor thin film
JP4559397B2 (ja) * 1994-09-29 2010-10-06 株式会社半導体エネルギー研究所 結晶性珪素膜の作製方法、及び薄膜トランジスタの作製方法
USRE43450E1 (en) * 1994-09-29 2012-06-05 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating semiconductor thin film
JP3381443B2 (ja) 1995-02-02 2003-02-24 ソニー株式会社 基体から半導体層を分離する方法、半導体素子の製造方法およびｓｏｉ基板の製造方法
US5736431A (en) 1995-02-28 1998-04-07 Semiconductor Energy Laboratory Co., Ltd. Method for producing thin film solar battery
DE69738307T2 (de) 1996-12-27 2008-10-02 Canon K.K. Herstellungsverfahren eines Halbleiter-Bauelements und Herstellungsverfahren einer Solarzelle
US6251754B1 (en) * 1997-05-09 2001-06-26 Denso Corporation Semiconductor substrate manufacturing method
JPH1174209A (ja) 1997-08-27 1999-03-16 Denso Corp 半導体基板の製造方法
US6534380B1 (en) 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
JPH1147204A (ja) * 1997-08-06 1999-02-23 Yoshimaru Seisakusho:Kk 健康器具
US6331208B1 (en) 1998-05-15 2001-12-18 Canon Kabushiki Kaisha Process for producing solar cell, process for producing thin-film semiconductor, process for separating thin-film semiconductor, and process for forming semiconductor
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP2000223419A (ja) 1998-06-30 2000-08-11 Sony Corp 単結晶シリコン層の形成方法及び半導体装置の製造方法、並びに半導体装置
JP3358550B2 (ja) 1998-07-07 2002-12-24 信越半導体株式会社 Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
JP2000124092A (ja) 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ
JP2000349264A (ja) 1998-12-04 2000-12-15 Canon Inc 半導体ウエハの製造方法、使用方法および利用方法
JP2001015721A (ja) 1999-04-30 2001-01-19 Canon Inc 複合部材の分離方法及び薄膜の製造方法
US6387829B1 (en) 1999-06-18 2002-05-14 Silicon Wafer Technologies, Inc. Separation process for silicon-on-insulator wafer fabrication
JP2001160540A (ja) 1999-09-22 2001-06-12 Canon Inc 半導体装置の製造方法、液相成長法及び液相成長装置、太陽電池
JP3513592B2 (ja) 2000-09-25 2004-03-31 独立行政法人産業技術総合研究所 太陽電池の製造方法
JP3960792B2 (ja) * 2001-12-21 2007-08-15 シャープ株式会社 プラズマｃｖｄ装置、非晶質シリコン系薄膜の製造方法
US6818529B2 (en) 2002-09-12 2004-11-16 Applied Materials, Inc. Apparatus and method for forming a silicon film across the surface of a glass substrate
KR101166358B1 (ko) * 2003-10-28 2012-07-23 가부시키가이샤 한도오따이 에네루기 켄큐쇼 배선 형성 방법, 박막 트랜지스터 제조 방법, 및 액적 토출방법
JP2007184505A (ja) * 2006-01-10 2007-07-19 Kaneka Corp シリコン系薄膜光電変換装置の製造方法
CN101512721A (zh) 2006-04-05 2009-08-19 硅源公司 利用层转移工艺制造太阳能电池的方法和结构
JP2008112847A (ja) 2006-10-30 2008-05-15 Shin Etsu Chem Co Ltd 単結晶シリコン太陽電池の製造方法及び単結晶シリコン太陽電池
CN101652867B (zh) 2007-04-06 2012-08-08 株式会社半导体能源研究所 光伏器件及其制造方法
JP5058909B2 (ja) * 2007-08-17 2012-10-24 株式会社半導体エネルギー研究所 プラズマｃｖｄ装置及び薄膜トランジスタの作製方法
JP5248994B2 (ja) 2007-11-30 2013-07-31 株式会社半導体エネルギー研究所 光電変換装置の製造方法
JP5248995B2 (ja) 2007-11-30 2013-07-31 株式会社半導体エネルギー研究所 光電変換装置の製造方法
US7781308B2 (en) * 2007-12-03 2010-08-24 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
US7910929B2 (en) 2007-12-18 2011-03-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5459900B2 (ja) * 2007-12-25 2014-04-02 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5572307B2 (ja) 2007-12-28 2014-08-13 株式会社半導体エネルギー研究所 光電変換装置の製造方法
US8211781B2 (en) * 2008-11-10 2012-07-03 Stanley Electric Co., Ltd. Semiconductor manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210148548A (ko) * 2020-05-29 2021-12-08 삼성디스플레이 주식회사 표시 장치 및 그 제조 방법

Also Published As

Publication number Publication date
JP2011135051A (ja) 2011-07-07
US20110124164A1 (en) 2011-05-26
US8815662B2 (en) 2014-08-26
JP5706670B2 (ja) 2015-04-22

Similar Documents

Publication Publication Date Title
KR20110058682A (ko) Ｓｏｉ 기판 및 반도체 장치의 제작 방법
US8735263B2 (en) Method for manufacturing SOI substrate
KR101642335B1 (ko) 반도체 기판의 제조방법
US8513090B2 (en) Method for manufacturing semiconductor substrate, and semiconductor device
JP2004288780A (ja) 半導体装置およびその製造方法
JPWO2014065018A1 (ja) 半導体装置の製造方法
KR20110000519A (ko) Ｓｏｉ 기판의 제작 방법 및 ｓｏｉ 기판
US8043937B2 (en) Method for manufacturing semiconductor substrate
US8173496B2 (en) Method for manufacturing semiconductor device
JP5977947B2 (ja) Ｓｏｉ基板の作製方法
KR20120059509A (ko) 반도체 장치 및 그 제작 방법
JP2010199529A (ja) 薄膜トランジスタの製造方法
WO2018055838A1 (ja) 半導体素子の製造方法及び半導体基板
JP2020035801A (ja) 半導体装置及び半導体装置の製造方法
TWI305055B (en) Semiconductor device and method of manufacturing the same
JP3925085B2 (ja) 半導体装置の製造方法、光変調素子の製造方法、および表示装置の製造方法
US20110024764A1 (en) Semiconductor device, method for producing the same, and display device
JP2007142021A (ja) 順スタガ構造薄膜トランジスタの製造方法
JPH0974206A (ja) 半導体装置およびその作製方法
JP2007173612A (ja) 半導体装置の製造方法
JP2006135348A (ja) 半導体装置およびその作製方法

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E601 Decision to refuse application
PE0601 Decision on rejection of patent

St.27 status event code: N-2-6-B10-B15-exm-PE0601

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000