KR20080077836A - 반도체 패키지 장치와, 반도체 패키지의 제조방법과,반도체 패키지 장치를 갖는 카드 장치 및 반도체 패키지장치를 갖는 카드 장치의 제조 방법 - Google Patents
반도체 패키지 장치와, 반도체 패키지의 제조방법과,반도체 패키지 장치를 갖는 카드 장치 및 반도체 패키지장치를 갖는 카드 장치의 제조 방법 Download PDFInfo
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- KR20080077836A KR20080077836A KR1020070017537A KR20070017537A KR20080077836A KR 20080077836 A KR20080077836 A KR 20080077836A KR 1020070017537 A KR1020070017537 A KR 1020070017537A KR 20070017537 A KR20070017537 A KR 20070017537A KR 20080077836 A KR20080077836 A KR 20080077836A
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Abstract
Description
Claims (36)
- 범프가 형성된 반도체 칩;상기 반도체 칩이 삽입되는 관통창이 형성된 기판;상기 기판에 형성되고, 범프와 전기적으로 연결되는 도전체; 및상기 반도체 칩과 도전체 사이에 설치되는 절연체;를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 도전체는 금속인 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 관통창은 상기 반도체 칩의 일부 또는 전부가 삽입될 수 있도록 적어도 상기 반도체 칩의 크기 이상으로 형성되는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 반도체 칩은, 범프가 형성된 회로면이 상기 기판을 향하도록 상기 기판의 관통창에 삽입되고,상기 도전체는, 상기 관통창으로 삽입된 상기 반도체 칩의 범프와 전기적으 로 서로 연결될 수 있도록 상기 범프와 대응하는 위치에 형성되며,상기 절연체는, 상기 범프와 상기 반도체 칩의 회로면이 외부로 노출되지 않도록 상기 범프를 둘러싸는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 도전체는, 상기 기판 위에 금속박을 형성하고, 사진공정으로 불필요한 부분을 식각하여 남은 부분으로 이루어지는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 도전체는, 일단이 상기 관통창의 일측 기판에 고정되고, 중심부분이 상기 관통창을 가로질러서 타단이 상기 관통창의 타측 기판에 고정되도록 길게 연장되는 연장부가 형성되는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 절연체는, 상기 관통창에 액상으로 주입되어 경화되는 접착제를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치.
- 제 7항에 있어서,상기 접착제는, 에폭시 수지 성분을 포함하여 이루어지는 것을 특징으로 하 는 반도체 패키지 장치.
- 제 1항에 있어서,상기 절연체는, 상기 관통창에 충진되는 봉지제를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 절연체는, 상기 관통창에 삽입되고, 상기 범프가 관통하는 구멍이 형성되는 절연 조립체를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 절연체는 이방성 도전 필름(ACF; Anisotropic Conductive Film)을 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 도전체와 그 이웃하는 도전체 사이의 이격 공간으로 절연체가 누출되는 것이 방지되도록 상기 도전체와 절연체 사이에 절연재질의 누출 방지막이 설치되는 것을 특징으로 하는 반도체 패키지 장치.
- 제 12항에 있어서,상기 누출 방지막은, 상기 반도체 칩과, 절연체가 상기 기판에 설치되기 이전에, 상기 도전체와 그 이웃하는 도전체의 일면에 도포 또는 설치되는 절연 필름을 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 도전체와 그 이웃하는 도전체 사이의 이격 공간으로 절연체가 누출되는 것이 방지되도록 상기 도전체와 그 이웃하는 도전체 사이에 절연재질의 메꿈층이 설치되는 것을 특징으로 하는 반도체 패키지 장치.
- 제 14항에 있어서,상기 메꿈층은, 상기 도전체와 그 이웃하는 도전체 사이의 누설전류와 박리현상을 방지하도록 적어도 도전체 두께 이상의 두께로 형성되는 것을 특징으로 하는 반도체 패키지 장치.
- 제 14항에 있어서,상기 메꿈층은, 상기 반도체 칩에 도달되는 것을 특징으로 하는 반도체 패키지 장치.
- 제 14항에 있어서,상기 메꿈층은, 상기 반도체 칩과, 절연체가 상기 기판에 설치되기 이전에, 상기 도전체에 스크린 프린팅되는 것을 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 도전체와 그 이웃하는 도전체 사이의 이격 공간으로 절연체가 누출되는 것이 방지되도록 상기 도전체와 그 이웃하는 도전체 사이의 이격 공간을 덮는 보호막이 설치되는 것을 특징으로 하는 반도체 패키지 장치.
- 제 18항에 있어서,상기 보호막은 상기 반도체 칩과, 절연체가 상기 기판에 설치된 이후에 상기 도전체로부터 제거되는 임시 박리지인 것을 특징으로 하는 반도체 패키지 장치.
- 제 1항에 있어서,상기 반도체 칩에 적어도 하나 이상의 층으로 적층되고, 상기 도전체와 신호 전달매체로 연결되는 적어도 하나의 다층형 반도체 칩;을 더 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치.
- 제 20항에 있어서,상기 신호 전달매체는, 상기 도전체 또는 이웃하는 반도체 칩의 회로면과 전기적으로 연결되는 와이어(Wire)인 것을 특징으로 하는 반도체 패키지 장치.
- 제 20항에 있어서,상기 신호 전달매체는, 상기 도전체 또는 이웃하는 반도체 칩의 회로면과 전기적으로 연결되도록 칩을 관통하여 형성된 트루 비아(Through Via)인 것을 특징으로 하는 반도체 패키지 장치.
- 제 20항에 있어서,상기 신호 전달매체는, 상기 도전체 또는 이웃하는 반도체 칩의 회로면과 전기적으로 연결되는 범프(Bump) 또는 볼(Ball)인 것을 특징으로 하는 반도체 패키지 장치.
- 기판에 반도체 칩이 삽입될 수 있는 크기의 관통창을 형성하는 관통창 형성 단계;상기 기판의 일면에 도전체가 상기 관통창을 통해 부분적으로 노출되도록 도전체를 형성하는 도전체 형성 단계;상기 반도체 칩의 회로면이 기판을 향하도록 상기 반도체 칩을 상기 관통창 삽입하고, 상기 반도체 칩의 범프가 상기 도전체에 전기적으로 접촉되도록 연결하는 칩 삽입 단계; 및상기 반도체 칩과 상기 기판과 상기 도전체가 물리적으로 서로 고정되도록 상기 반도체 칩과 도전체 사이에 절연체를 설치하는 절연체 설치 단계;를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 24항에 있어서,상기 도전체 형성 단계는, 상기 기판 위에 금속박을 부착하거나 도금으로 형성하는 금속박 형성단계와, 상기 금속박을 사진공정으로 불필요한 부분을 식각하는 식각 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 24항에 있어서,상기 절연체 설치 단계는, 상기 관통창에 접착제 또는 봉지제를 액상으로 주입하고 경화시키는 것으로 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 24항에 있어서,상기 절연체 설치 단계는, 상기 칩 삽입 단계와 동시에 이루어지고, 상기 관통창에 삽입되고, 상기 범프가 관통하는 구멍이 형성되는 조립체를 상기 반도체 칩과 도전체 사이에 조립하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 24항에 있어서,상기 절연체 설치 단계는, 상기 칩 삽입 단계와 동시에 이루어지고, 이방성 도전 필름(ACF; Anisotropic Conductive Film)을 상기 반도체 칩과 도전체 사이에 설치하고, 상기 반도체 칩의 범프가 상기 도전체와 전기적으로 연결되도록 상기 반도체 칩을 도전체 방향으로 가압하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 24항에 있어서,상기 도전체 형성 단계에서, 형성된 도전체와 그 이웃하는 도전체의 일면에 상기 절연체가 누출되는 것이 방지되도록 누출 방지막이 설치되어 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 24항에 있어서,상기 도전체 형성 단계에서, 형성된 도전체와 그 이웃하는 도전체 사이에 상기 절연체가 누출되는 것이 방지되도록 스크린 프린팅 방식의 메꿈층이 설치되어 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 24항에 있어서,상기 도전체 형성 단계에서, 절연체가 누출되는 것이 방지되도록 상기 도전체와 그 이웃하는 도전체 사이의 이격 공간을 임시 박리지로 덮고,상기 절연체 설치 단계 이후에 상기 임시 박리지를 상기 도전체로부터 제거하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 24항에 있어서,상기 칩 삽입 단계 이전에, 상기 반도체 칩에 다층형 반도체 칩을 적층하는 칩 형성 단계;를 더 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 32항에 있어서,상기 칩 형성 단계는, 상기 도전체와 다층형 반도체 칩 또는 반도체 칩과 그 이웃하는 반도체 칩을 전기적으로 연결시킬 수 있도록 와이어 본딩하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 제 32항에 있어서,상기 칩 형성 단계는, 상기 도전체와 다층형 반도체 칩 또는 반도체 칩과 그 이웃하는 반도체 칩을 전기적으로 연결시킬 수 있도록 상기 반도체 칩 또는 다층형 반도체 칩에 트루 비아(Through Via)를 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치의 제조 방법.
- 범프가 형성된 반도체 칩과, 상기 반도체 칩이 삽입되는 관통창이 형성된 기판과, 상기 기판에 형성되고, 범프와 전기적으로 연결되는 도전체 및 상기 반도체 칩과 도전체 사이에 설치되는 절연체를 포함하여 이루어지는 반도체 패키지 장치; 및상기 반도체 패키지 장치와 대응되도록 일면에 상기 반도체 패키지 장치가 삽입되는 삽입홈이 형성되고, 상기 삽입홈의 가운데부분에는 상기 반도체 칩과 대응되는 칩 삽입면이 형성되며, 상기 삽입홈의 테두리부분에 상기 기판의 어깨부분과 접착되는 견착면이 형성되는 카드 몸체;를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치를 갖는 카드 장치.
- 기판에 반도체 칩이 삽입될 수 있는 크기의 관통창을 형성하는 관통창 형성 단계와, 상기 기판의 일면에 상기 관통창을 통해 부분적으로 노출되도록 도전체를 형성하는 도전체 형성 단계와, 상기 반도체 칩의 회로면이 기판을 향하도록 상기 반도체 칩을 상기 관통창 삽입하고, 상기 반도체 칩의 범프가 상기 도전체에 전기적으로 접촉되도록 연결하는 칩 삽입 단계 및 상기 반도체 칩과 상기 기판과 상기 도전체가 물리적으로 서로 고정되도록 상기 반도체 칩과 도전체 사이에 절연체를 설치하는 절연체 설치 단계를 포함하여 이루어지는 반도체 패키지 장치의 제조 단계;상기 반도체 패키지 장치와 대응되도록 카드 몸체의 일면에 상기 반도체 패키지 장치가 삽입되는 삽입홈을 형성하고, 상기 삽입홈의 가운데부분에는 상기 반 도체 칩과 대응되는 칩 삽입면을 형성하며, 상기 삽입홈의 테두리부분에 상기 기판의 어깨부분과 접착되는 견착면을 형성하는 카드 몸체 형성 단계; 및상기 반도체 패키지 장치의 기판의 어깨부분과 상기 카드 몸체의 견착면을 접착시키는 패키지 접착 단계;를 포함하여 이루어지는 것을 특징으로 하는 반도체 패키지 장치를 갖는 카드 장치의 제조 방법.
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US11/959,276 US7728422B2 (en) | 2007-02-21 | 2007-12-18 | Semiconductor package, integrated circuit cards incorporating the semiconductor package, and method of manufacturing the same |
DE102008008068A DE102008008068A1 (de) | 2007-02-21 | 2008-02-01 | Halbleiterpackung, elektronisches System und Verfahren zur Herstellung derselben |
TW097105921A TWI431754B (zh) | 2007-02-21 | 2008-02-20 | 半導體封裝、具該封裝的積體電路卡以及其製造方法 |
CN2008100808376A CN101252115B (zh) | 2007-02-21 | 2008-02-21 | 半导体封装及其制造方法和电子系统及其制造方法 |
JP2008039600A JP5164599B2 (ja) | 2007-02-21 | 2008-02-21 | 半導体パッケージ、半導体パッケージの製造方法、電子システムの製造方法、および、電子システム |
US12/768,857 US8329507B2 (en) | 2007-02-21 | 2010-04-28 | Semiconductor package, integrated circuit cards incorporating the semiconductor package, and method of manufacturing the same |
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US20020127771A1 (en) * | 2001-03-12 | 2002-09-12 | Salman Akram | Multiple die package |
US6791168B1 (en) * | 2002-07-10 | 2004-09-14 | Micron Technology, Inc. | Semiconductor package with circuit side polymer layer and wafer level fabrication method |
JP2004349361A (ja) * | 2003-05-21 | 2004-12-09 | Casio Comput Co Ltd | 半導体装置およびその製造方法 |
JP2005191027A (ja) * | 2003-12-24 | 2005-07-14 | Seiko Epson Corp | 回路基板製造方法及び回路基板並びに電子機器 |
KR100610144B1 (ko) * | 2004-11-03 | 2006-08-09 | 삼성전자주식회사 | 플립 칩 조립 구조를 가지는 칩-온-보드 패키지의 제조 방법 |
EP1724712A1 (fr) * | 2005-05-11 | 2006-11-22 | Stmicroelectronics Sa | Micromodule, notamment pour carte à puce |
US7262444B2 (en) * | 2005-08-17 | 2007-08-28 | General Electric Company | Power semiconductor packaging method and structure |
WO2007088757A1 (ja) * | 2006-02-02 | 2007-08-09 | Matsushita Electric Industrial Co., Ltd. | メモリカードおよびメモリカードの製造方法 |
-
2007
- 2007-02-21 KR KR1020070017537A patent/KR100891330B1/ko active IP Right Grant
- 2007-12-18 US US11/959,276 patent/US7728422B2/en not_active Expired - Fee Related
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2008
- 2008-02-20 TW TW097105921A patent/TWI431754B/zh not_active IP Right Cessation
- 2008-02-21 CN CN2008100808376A patent/CN101252115B/zh not_active Expired - Fee Related
- 2008-02-21 JP JP2008039600A patent/JP5164599B2/ja not_active Expired - Fee Related
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2010
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Also Published As
Publication number | Publication date |
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US7728422B2 (en) | 2010-06-01 |
US8329507B2 (en) | 2012-12-11 |
KR100891330B1 (ko) | 2009-03-31 |
TW200840012A (en) | 2008-10-01 |
US20080197479A1 (en) | 2008-08-21 |
US20100210074A1 (en) | 2010-08-19 |
CN101252115A (zh) | 2008-08-27 |
TWI431754B (zh) | 2014-03-21 |
JP5164599B2 (ja) | 2013-03-21 |
JP2008204462A (ja) | 2008-09-04 |
CN101252115B (zh) | 2012-06-27 |
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