KR100455806B1 - 반도체 장치 및 그 제조 방법 - Google Patents
반도체 장치 및 그 제조 방법 Download PDFInfo
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- KR100455806B1 KR100455806B1 KR10-2002-0057238A KR20020057238A KR100455806B1 KR 100455806 B1 KR100455806 B1 KR 100455806B1 KR 20020057238 A KR20020057238 A KR 20020057238A KR 100455806 B1 KR100455806 B1 KR 100455806B1
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- layer
- silicon
- film
- gate electrode
- nitride film
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 41
- 238000004519 manufacturing process Methods 0.000 title description 13
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 80
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 80
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 62
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 62
- 239000010703 silicon Substances 0.000 claims abstract description 62
- 239000012535 impurity Substances 0.000 claims abstract description 44
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 39
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 239000010410 layer Substances 0.000 claims description 123
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 29
- 229920005591 polysilicon Polymers 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 27
- 238000001312 dry etching Methods 0.000 claims description 22
- 238000005530 etching Methods 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 17
- 229910021332 silicide Inorganic materials 0.000 claims description 17
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 17
- 125000006850 spacer group Chemical group 0.000 claims description 16
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 12
- 239000010936 titanium Substances 0.000 claims description 12
- 229910052719 titanium Inorganic materials 0.000 claims description 12
- 229910021341 titanium silicide Inorganic materials 0.000 claims description 12
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 10
- 238000005468 ion implantation Methods 0.000 claims description 6
- 238000001459 lithography Methods 0.000 claims description 6
- 239000011229 interlayer Substances 0.000 claims description 5
- 239000000969 carrier Substances 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 4
- 230000001590 oxidative effect Effects 0.000 claims description 4
- 150000004767 nitrides Chemical class 0.000 claims description 2
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 9
- 229910021342 tungsten silicide Inorganic materials 0.000 description 9
- 229910052698 phosphorus Inorganic materials 0.000 description 8
- 239000011574 phosphorus Substances 0.000 description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 6
- 238000000206 photolithography Methods 0.000 description 6
- 238000004544 sputter deposition Methods 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- -1 phosphorus ions Chemical class 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising semiconducting material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
- H01L21/823425—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
- H01L29/41783—Raised source or drain electrodes self aligned with the gate
Abstract
Description
Claims (15)
- 반도체 기판에 한 쌍의 불순물 영역을 갖는 반도체 장치에 있어서,상기 불순물 영역상에 형성된 실리콘층;상기 불순물 영역 사이에 형성된 게이트 절연막;상기 게이트 절연막 상에 형성된 게이트 전극;상기 게이트 전극상에 형성된 제 1의 실리콘 질화막;상기 게이트 전극의 표면상에 형성된 실리콘 산화막;상기 실리콘 산화막의 측면상에 형성되고 상기 실리콘층상에 부분적으로 형성된 제 2의 실리콘 질화막; 및상기 실리콘층상에 형성된 도전층을 포함하는 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,상기 게이트 전극은 폴리실리콘층 및 금속층 또는 금속 실리사이드층으로 이루어지는 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,상기 실리콘 산화막 및 상기 제 2의 실리콘 질화막은 이중 측벽 스페이서를 구성하는 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,상기 실리콘층은 상기 실리콘 산화막에 의해서만 상기 게이트 전극으로부터 절연되고;상기 제 2의 질화막의 하부 에지는 상기 실리콘층의 상면과 접촉하는 것을 특징으로 하는 반도체 장치.
- 제 3항에 있어서,상기 도전층은 제 1의 실리콘 질화막 및 상기 이중 측벽 스페이서에 의헤 게이트 전극으로부터 절연되는 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,실리사이드층은 상기 도전층과 상기 실리콘층 사이에 배치되는 것을 특징으로 하는 반도체 장치.
- 제 6항에 있어서,공핍층은 상기 불순물 영역 근처에 형성되고,상기 실리콘 층은 상기 공핍층이 상기 실리사이드층에 도달하는 것을 방지하기 위한 기능을 하는 것을 특징으로 하는 반도체 장치.
- 반도체 기판상에 게이트 절연막을 형성하는 단계;상기 게이트 절연막상에 게이트 전극을 형성하는 단계;상기 게이트 전극상에 제 1의 실리콘 질화막을 형성하는 단계;상기 게이트 전극을 측면에 실리콘 산화막을 형성하는 단계;상기 반도체 기판의 게이트 전극의 양 측면에 불순물 영역을 형성하는 단계;상기 불순물 영역상에 실리콘층을 형성하는 단계;상기 실리콘 산화막의 측면에서 상기 실리콘층상에 제 2의 실리콘 질화막을 부분적으로 형성하는 단계; 및상기 실리콘층상에 도전층을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 8항에 있어서,상기 게이트 전극은 폴리실리콘층 및 금속층 또는 금속 실리사이드층으로 형성되는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 8항에 있어서,상기 실리콘층은 선택적 에피택셜 성장에 의해 상기 불순물 영역상에 선택적으로 성장되는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 8항에 있어서,상기 실리콘층상에 티타늄/티타늄 질화 적층막을 형성하는 단계; 및열처리에 의해 상기 실리콘층상에 티타늄 실리사이드층을 형성하는 단계를 더 포함하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 11항에 있어서,공핍층은 상기 불순물 영역 근처에 형성되고;상기 실리콘층은 상기 공핍층이 상기 티타늄 실리사이드층에 도달하는 것을 방지하기 위한 기능을 하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 8항에 있어서,상기 실리콘 산화막 및 상기 제 2의 실리콘 질화막은 이중 측벽 스페이서를 구성하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 13항에 있어서,핫 캐리어는 상기 불순물 영역의 에지에서 생성되고;상기 제 2의 실리콘 질화막 및 상기 불순물 영역의 에지 사이의 거리는 핫 캐리어가 상기 제 2의 실리콘 질화막에서 트랩되지 않도록 선택되는 것을 특징으로 하는 반도체 장치 제조 방법.
- 반도체 기판상에 게이트 절연막을 형성하는 단계;상기 반도체 기판상에 폴리실리콘막 및 금속막 또는 금속 실리사이드막 및 제 1의 실리콘 질화막을 차례로 형성하는 단계;리소그래피 및 이방성 드라이 에칭에 의해 불필요한 부분을 제거함으로써 게이트 전극을 형성하는 단계;산화 분위기에서 상기 폴리실리콘막의 적어도 측면을 산화하는 단계;이방성 드라이 에칭에 의해 상화막을 에치-백하여 상기 실리콘 기판의 표면을 노출시키는 단계;이온 주입에 의해 소스/드레인 영역을 형성하는 단계;실리콘 선택적 성장에 의해 상기 소스/드레인 영역상에 실리콘층을 성장시키는 단계;제 2의 실리콘 질화막을 전체적으로 성장시키는 단계;이방성 드라이 에칭에 의해 상기 제 2의 실리콘 질화막을 에치-백하여 상기 실리콘층을 노출시키는 단계;실리콘 산화막으로 이루어진 층간 절연막을 형성하는 단계; 및리소그래피 및 드라이 에칭에 의해 콘택트 홀을 개구하는 단계를 포함하는 것을 특징으로 하는 반도체 장치 제조 방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2001286140A JP2003100769A (ja) | 2001-09-20 | 2001-09-20 | 半導体装置およびその製造方法 |
JPJP-P-2001-00286140 | 2001-09-20 |
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KR20030025877A KR20030025877A (ko) | 2003-03-29 |
KR100455806B1 true KR100455806B1 (ko) | 2004-11-06 |
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US (3) | US6914309B2 (ko) |
JP (1) | JP2003100769A (ko) |
KR (1) | KR100455806B1 (ko) |
CN (1) | CN1210813C (ko) |
TW (1) | TW583769B (ko) |
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KR100496258B1 (ko) * | 2003-02-17 | 2005-06-17 | 삼성전자주식회사 | 콘택 패드를 포함하는 반도체 장치 및 이의 제조 방법 |
US7674697B2 (en) * | 2005-07-06 | 2010-03-09 | International Business Machines Corporation | MOSFET with multiple fully silicided gate and method for making the same |
JP4215787B2 (ja) | 2005-09-15 | 2009-01-28 | エルピーダメモリ株式会社 | 半導体集積回路装置およびその製造方法 |
US20070202677A1 (en) * | 2006-02-27 | 2007-08-30 | Micron Technology, Inc. | Contact formation |
US7569896B2 (en) * | 2006-05-22 | 2009-08-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Transistors with stressed channels |
US7364957B2 (en) * | 2006-07-20 | 2008-04-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for semiconductor device with improved source/drain junctions |
US20080083955A1 (en) * | 2006-10-04 | 2008-04-10 | Kanarsky Thomas S | Intrinsically stressed liner and fabrication methods thereof |
KR100876758B1 (ko) * | 2006-12-26 | 2009-01-08 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
CN111403341B (zh) * | 2020-03-28 | 2023-03-28 | 电子科技大学 | 降低窄控制栅结构栅电阻的金属布线方法 |
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JP2003100769A (ja) | 2003-04-04 |
US20100200925A1 (en) | 2010-08-12 |
US6914309B2 (en) | 2005-07-05 |
CN1405896A (zh) | 2003-03-26 |
US7709366B2 (en) | 2010-05-04 |
US20050196944A1 (en) | 2005-09-08 |
KR20030025877A (ko) | 2003-03-29 |
CN1210813C (zh) | 2005-07-13 |
TW583769B (en) | 2004-04-11 |
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