CN111403341B - 降低窄控制栅结构栅电阻的金属布线方法 - Google Patents
降低窄控制栅结构栅电阻的金属布线方法 Download PDFInfo
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Abstract
本发明提供一种降低窄控制栅结构栅电阻的金属布线方法,在栅结构上每隔一定的间距刻为第一栅电极和第二栅电极,同时每隔一定间距保留完整控制栅电极,从而构成第一、第二栅电极与完整栅电极间隔排列的结构,在完整栅电极部位打孔引出金属,为第一层金属;在源区与分离栅上打孔引出金属,为第二层金属;两层金属之间由介质层隔开,通过第一层金属在Y方向上与栅电极的多点接触,解决Y方向上控制栅电极路径过长带来的栅电阻增大问题,同时,通过控制完整栅电极在Y方向上的间距来控制栅电阻的大小,由此利用多层金属得到低栅电阻的窄栅结构的金属氧化物半导体场效应管,使得本发明所述器件既有低栅电容特性,又有低栅电阻特性。
Description
技术领域
本发明属于半导体技术领域,具体涉及一种降低窄控制栅结构栅电阻的金属布线方式。
背景技术
功率管理系统要求功率半导体器件具有低的导通电阻和寄生电容,以降低器件导通损耗和开关损耗。功率VDMOS因栅驱动功耗低,开关速度快,容易并联等特点被广泛应用于功率管理系统中。乔明、王正康、张波等人的中国发明专利201910191166.9以及美国发明专利US16/536333提出了一种窄栅结构的沟槽式金属氧化物半导体场效应管,然而该栅结构过窄,并且是在边缘处引出电极,导致路径过长,从而会带来栅电阻过大的问题,而栅极电阻值太大,将导致损耗过大。
因此,针对以上问题,有必要降低窄栅结构所带来的栅电阻过大问题,本发明的实施例就是在这种背景下出现的。
发明内容
本发明提供一种降低窄控制栅结构栅电阻的金属布线方式,针对乔明、王正康、张波等人的中国发明专利201910191166.9以及美国发明专利US16/536333所提出的结构带来的栅电阻过大问题进行了金属布线优化,传统布线方式如图3所示,栅电极在边缘处引出,然而通过上述专利改进的窄栅结构会缩窄电流路径,从而大大增加栅电阻,提高开关损耗。
为实现上述发明目的,本发明技术方案如下:
一种降低窄控制栅结构栅电阻的金属布线方法,在栅结构上每隔一定的间距刻为第一栅电极131和第二栅电极132,每隔一定间距保留完整栅电极,从而构成第一、第二栅电极与完整栅电极间隔排列的结构,在完整栅电极部位打孔引出金属,为第一层金属15;在源区与分离栅上打孔引出金属,为第二层金属19;两层金属之间由介质层11隔开,通过第一层金属在Y方向上与栅电极的多点接触,解决Y方向上控制栅电极路径过长带来的栅电阻增大问题,同时,通过控制相邻完整栅电极部位在Y方向上的间距来控制栅电阻的大小,由此利用多层金属得到低栅电阻的窄栅结构的金属氧化物半导体场效应管。
作为优选方式,第一导电类型衬底29上表面有第一导电类型外延层26,第一导电类型外延层26中有控制栅槽,控制栅槽中包含控制栅电极13、分离栅电极22,控制栅电极13包括第一栅电极131和第二栅电极132,第一栅电极131和第二栅电极132位于控制栅槽的上半部分,第一栅电极131和第二栅电极132在Y方向上每隔一定距离相连接,二者非连接处通过介质层11隔开,第一栅电极131和第二栅电极132位于分离栅电极22的上方,且和分离栅电极22通过介质层11隔开,分离栅电极22位于控制栅槽的下半部分,且通过介质层11与第一导电类型外延层26隔开;在相邻控制栅槽之间,第一导电类型外延层26上方有第二导电类型阱区25,在第二导电类型阱区25内有第二导电类型重掺杂区251,在第二导电类型阱区25上方有第一导电类型重掺杂源区18,在第一栅电极131和第二栅电极132相连接部位打孔引出金属,为第一层金属15;在第一导电类型重掺杂源区18、第二导电类型重掺杂区251与分离栅电极22上打孔引出金属,为第二层金属19,第一层金属15与第二层金属19之间由介质层11隔开。
作为优选方式,所述方法包括如下步骤:
1)在外延层上形成一系列的槽;
2)在有源区的控制栅槽的下半部分形成分离栅电极;
3)在有源区的槽内、分离栅上部形成一层介质层;
4)在有源区中控制栅槽的上半部分,形成覆盖侧壁的栅介质;随后在有源区中淀积栅电极;
5)对控制栅的中央部分进行刻蚀,在Y方向上每间隔一定距离刻开,形成覆盖控制栅槽上半部分侧壁的第一栅电极和第二栅电极,第一栅电极和第二栅电极相连接;
6)在外延层上表面形成第二导电类型体区,在第二导电类型体区中形成第一导电类型源极;
7)Y方向上,在第一栅电极和第二栅电极相连接处刻蚀栅极接触孔,引出栅电极金属,为第一层金属;
8)淀积介质层
9)在源区与分离栅引出区刻蚀源极接触孔,引出源极金属,为第二层金属。
作为优选方式,隔开第一层与第二层金属的介质层为低k材料。
作为优选方式,Y方向上的相邻栅极接触孔14之间的间距任意调节,以达到不同的栅电阻需求。
作为优选方式,Y方向上的相邻完整栅电极部位之间的间距任意调节,以达到不同的栅电阻需求。
作为优选方式,Y方向上第一栅电极与第二栅电极全部刻开,栅电极接触处为间隔式接触孔。
作为优选方式,该布线方式同样适用于非窄栅结构与非分离栅等结构。
本发明的有益效果为:利用多层金属,对乔明、王正康、张波等人的中国发明专利201910191166.9以及美国发明专利US16/536333所提出的结构进行改善,通过第一层金属在Y方向上与栅电极的多点接触,有效降低了Y方向上控制栅电极路径过长带来的栅电阻增大问题,同时,通过控制Y方向上金属与控制栅的接触点距离与密度可控制栅电阻的大小,大大提高了设计灵活性,由此可利用多层金属,得到低栅电阻的窄栅结构的金属氧化物半导体场效应管,使得本发明所述器件既有低栅电容特性,又有低栅电阻特性,得到低栅电阻的窄栅结构的金属氧化物半导体场效应管。
附图说明
图1为传统分离栅结构金属布线图。
图2为图1AA’处剖面图。
图3为本发明实施例1一种窄栅结构的沟槽式金属氧化物半导体场效应管金属布线方式俯视图。
图4(a)为图3位置AA’处得剖面图。
图4(b)为图3位置BB’处得剖面图。
图5为本发明实施例2提供的基于本发明的一种栅结构与金属布线图。
图6(a)为图5位置AA’处的剖面图。
图6(b)为图5位置BB’处得剖面图。
图7为本发明实施例3提供的基于本发明的一种栅结构与金属布线图。
图8为图7AA’处剖面图。
其中,11为介质层,13为控制栅电极,131为第一栅电极,132为第二栅电极,14为栅极接触孔,15为第一层金属,17为源极接触孔,18为第一导电类型重掺杂源区,19为第二层金属,20为底部电极,22为分离栅电极,25第二导电类型阱区,251为第二导电类型重掺杂区,26为第一导电类型外延层,29为第一导电类型衬底。
具体实施方式
实施例1
如图3所示,本实施例提供一种降低窄控制栅结构栅电阻的金属布线方法,在栅结构上每隔一定的间距刻为第一栅电极131和第二栅电极132,每隔一定间距保留完整控制栅电极,从而构成第一、第二栅电极与完整栅电极间隔排列的结构,在完整栅电极部位打孔引出金属,为第一层金属15;在源区与分离栅上打孔引出金属,为第二层金属19;两层金属之间由介质层11隔开,通过第一层金属在Y方向上与栅电极的多点接触,解决Y方向上控制栅电极路径过长带来的栅电阻增大问题,同时,通过控制完整栅电极在Y方向上的间距来控制栅电阻的大小,由此利用多层金属得到低栅电阻的窄栅结构的金属氧化物半导体场效应管。
第一导电类型衬底29上表面有第一导电类型外延层26,第一导电类型外延层26中有控制栅槽,控制栅槽中包含控制栅电极13、分离栅电极22,控制栅电极13包括第一栅电极131和第二栅电极132,第一栅电极131和第二栅电极132位于控制栅槽的上半部分,第一栅电极131和第二栅电极132在Y方向上每隔一定距离相连接,二者非连接处通过介质层11隔开,第一栅电极131和第二栅电极132位于分离栅电极22的上方,且和分离栅电极22通过介质层11隔开,分离栅电极22位于控制栅槽的下半部分,且通过介质层11与第一导电类型外延层26隔开;在相邻控制栅槽之间,第一导电类型外延层26上方有第二导电类型阱区25,在第二导电类型阱区25内有第二导电类型重掺杂区251,在在第二导电类型阱区25上方有第一导电类型重掺杂源区18,在第一栅电极131和第二栅电极132相连接部位打孔引出金属,为第一层金属15;在第一导电类型重掺杂源区18、第二导电类型重掺杂区251与分离栅电极22上打孔引出金属,为第二层金属19,第一层金属15与第二层金属19之间由介质层11隔开。
所述方法包括如下步骤:
1)在外延层上形成一系列的槽;
2)在有源区的控制栅槽的下半部分形成分离栅电极;
3)在有源区的槽内、分离栅上部形成一层介质层;
4)在有源区中控制栅槽的上半部分,形成覆盖侧壁的栅介质;随后在有源区中淀积栅电极;
5)对控制栅的中央部分进行刻蚀,在Y方向上每间隔一定距离刻开,形成覆盖控制栅槽上半部分侧壁的第一栅电极和第二栅电极,第一栅电极和第二栅电极相连接;
6)在外延层上表面形成第二导电类型体区,在第二导电类型体区中形成第一导电类型源极;
7)Y方向上,在第一栅电极和第二栅电极相连接处刻蚀栅极接触孔,引出栅电极金属,为第一层金属;
8)在源区与分离栅引出区刻蚀源极接触孔,引出源极金属,为第二层金属。
优选的,隔开第一层与第二层金属的介质层为低k材料。
优选的,Y方向上的相邻栅极接触孔14之间的间距任意调节,以达到不同的栅电阻需求。
优选的,Y方向上的相邻完整栅电极部位之间的间距任意调节,以达到不同的栅电阻需求。
优选的,Y方向上第一栅电极与第二栅电极全部刻开,栅电极接触处为间隔式接触孔。
实施例2
如图5所示,本实施例和实施例1的区别在于:第一栅电极131与第二栅电极132全部分离,未通过栅本身连接,而是通过栅极接触孔14连接,栅极接触孔14的宽度大于第一栅电极131与第二栅电极132之间介质层11的宽度。
实施例3
如图7所示,本实施例与实施例1的区别在于:本实施例为非窄栅、非分离栅的传统结构,即Y方向上,控制栅13不刻开;槽内也无分离栅22结构。本实施例旨在说明本发明同样适用于非窄栅、非分离栅的传统结构中。
图8为图7AA’处剖面图,该图中无分离栅结构,同时控制栅为完整结构。
以上结合附图对本发明的实施例进行了详细阐述,但是本发明并不局限于上述的具体实施方式,上述具体实施方式仅仅是示意性的,而不是限制性的,本领域的普通技术人员在本发明的启示下,不脱离本发明宗旨和权利要求所保护范围的情况下还可以做出很多变形,这些均属于本发明的保护。
Claims (7)
1.一种降低窄控制栅结构栅电阻的金属布线方法,其特征在于:在栅结构上每隔一定的间距刻为第一栅电极(131)和第二栅电极(132),每隔一定间距保留完整栅电极,从而构成第一、第二栅电极与完整栅电极间隔排列的结构,在完整栅电极部位打孔引出金属,为第一层金属(15);在源区与分离栅上打孔引出金属,为第二层金属(19);两层金属之间由介质层(11)隔开,通过第一层金属在Y方向上与栅电极的多点接触,解决Y方向上控制栅电极路径过长带来的栅电阻增大问题,同时,通过控制完整栅电极在Y方向上的间距来控制栅电阻的大小,由此利用多层金属得到低栅电阻的窄栅结构的金属氧化物半导体场效应管;
第一导电类型衬底(29)上表面有第一导电类型外延层(26),第一导电类型外延层(26)中有控制栅槽,控制栅槽中包含控制栅电极(13)、分离栅电极(22),控制栅电极(13)包括第一栅电极(131)和第二栅电极(132),第一栅电极(131)和第二栅电极(132)位于控制栅槽的上半部分,第一栅电极(131)和第二栅电极(132)在Y方向上每隔一定距离相连接,二者非连接处通过介质层(11)隔开,第一栅电极(131)和第二栅电极(132)位于分离栅电极(22)的上方,且和分离栅电极(22)通过介质层(11)隔开,分离栅电极(22)位于控制栅槽的下半部分,且通过介质层(11)与第一导电类型外延层(26)隔开;在相邻控制栅槽之间,第一导电类型外延层(26)上方有第二导电类型阱区(25),在第二导电类型阱区(25)内有第二导电类型重掺杂区(251),在第二导电类型阱区(25)上方有第一导电类型重掺杂源区(18),在第一栅电极(131)和第二栅电极(132)相连接部位打孔引出金属,为第一层金属(15);在第一导电类型重掺杂源区(18)、第二导电类型重掺杂区(251)与分离栅电极(22)上打孔引出金属,为第二层金属(19),第一层金属(15)与第二层金属(19)之间由介质层(11)隔开。
2.根据权利要求1所述的一种降低窄控制栅结构栅电阻的金属布线方法,其特征在于包括如下步骤:
1)在外延层上形成一系列的槽;
2)在有源区的控制栅槽的下半部分形成分离栅电极;
3)在有源区的槽内、分离栅上部形成一层介质层;
4)在有源区中控制栅槽的上半部分,形成覆盖侧壁的栅介质;随后在有源区中淀积栅电极;
5)对控制栅的中央部分进行刻蚀,在Y方向上每间隔一定距离刻开,形成覆盖控制栅槽上半部分侧壁的第一栅电极和第二栅电极,第一栅电极和第二栅电极相连接;
6)在外延层上表面形成第二导电类型体区,在第二导电类型体区中形成第一导电类型源极;
7)Y方向上,在第一栅电极和第二栅电极相连接处刻蚀栅极接触孔,引出栅电极金属,为第一层金属;
8)淀积介质层;
9)在源区与分离栅引出区刻蚀源极接触孔,引出源极金属,为第二层金属。
3.根据权利要求1所述的一种降低窄控制栅结构栅电阻的金属布线方法,其特征在于:隔开第一层与第二层金属的介质层为低k材料。
4.根据权利要求1所述的一种降低窄控制栅结构栅电阻的金属布线方法,其特征在于:Y方向上的相邻栅极接触孔(14)之间的间距任意调节,以达到不同的栅电阻需求。
5.根据权利要求1所述的一种降低窄控制栅结构栅电阻的金属布线方法,其特征在于:Y方向上的相邻完整栅电极部位之间的间距任意调节,以达到不同的栅电阻需求。
6.根据权利要求1所述的一种降低窄控制栅结构栅电阻的金属布线方法,其特征在于:Y方向上第一栅电极与第二栅电极全部刻开,栅电极接触处为间隔式接触孔。
7.根据权利要求1所述的一种降低窄控制栅结构栅电阻的金属布线方法,其特征在于:本发明同样适用于非窄栅、非分离栅的传统结构中。
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