KR100399492B1 - 실리콘층상에배선또는전극을가지는반도체장치및그배선또는전극의형성방법 - Google Patents

실리콘층상에배선또는전극을가지는반도체장치및그배선또는전극의형성방법 Download PDF

Info

Publication number
KR100399492B1
KR100399492B1 KR10-1998-0710275A KR19980710275A KR100399492B1 KR 100399492 B1 KR100399492 B1 KR 100399492B1 KR 19980710275 A KR19980710275 A KR 19980710275A KR 100399492 B1 KR100399492 B1 KR 100399492B1
Authority
KR
South Korea
Prior art keywords
film
titanium
forming
electrode
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-1998-0710275A
Other languages
English (en)
Korean (ko)
Other versions
KR20000016675A (ko
Inventor
고타로 가타오카
히로시 이와타
마사유키 나가노
Original Assignee
샤프 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 샤프 가부시키가이샤 filed Critical 샤프 가부시키가이샤
Publication of KR20000016675A publication Critical patent/KR20000016675A/ko
Application granted granted Critical
Publication of KR100399492B1 publication Critical patent/KR100399492B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/10—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR10-1998-0710275A 1997-04-25 1998-04-23 실리콘층상에배선또는전극을가지는반도체장치및그배선또는전극의형성방법 Expired - Fee Related KR100399492B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP10867197A JP4101901B2 (ja) 1997-04-25 1997-04-25 半導体装置の製造方法
JP9-108671 1997-04-25

Publications (2)

Publication Number Publication Date
KR20000016675A KR20000016675A (ko) 2000-03-25
KR100399492B1 true KR100399492B1 (ko) 2003-12-24

Family

ID=14490735

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-1998-0710275A Expired - Fee Related KR100399492B1 (ko) 1997-04-25 1998-04-23 실리콘층상에배선또는전극을가지는반도체장치및그배선또는전극의형성방법

Country Status (6)

Country Link
US (2) US6562699B1 (https=)
EP (1) EP0928021B1 (https=)
JP (1) JP4101901B2 (https=)
KR (1) KR100399492B1 (https=)
DE (1) DE69837909T2 (https=)
WO (1) WO1998049724A1 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4101901B2 (ja) * 1997-04-25 2008-06-18 シャープ株式会社 半導体装置の製造方法
GB2360292B (en) * 2000-03-15 2002-04-03 Murata Manufacturing Co Photosensitive thick film composition and electronic device using the same
US7721491B2 (en) * 2004-07-23 2010-05-25 Jennifer Appel Method and system for storing water inside buildings
US20060057853A1 (en) * 2004-09-15 2006-03-16 Manoj Mehrotra Thermal oxidation for improved silicide formation
TW200816312A (en) * 2006-09-28 2008-04-01 Promos Technologies Inc Method for forming silicide layer on a silicon surface and its use
JP5076557B2 (ja) * 2007-03-06 2012-11-21 富士通セミコンダクター株式会社 半導体装置の製造方法
US10446662B2 (en) * 2016-10-07 2019-10-15 Taiwan Semiconductor Manufacturing Co., Ltd. Reducing metal gate overhang by forming a top-wide bottom-narrow dummy gate electrode
US10510851B2 (en) * 2016-11-29 2019-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Low resistance contact method and structure

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3095564B2 (ja) * 1992-05-29 2000-10-03 株式会社東芝 半導体装置及び半導体装置の製造方法
US3601666A (en) * 1969-08-21 1971-08-24 Texas Instruments Inc Titanium tungsten-gold contacts for semiconductor devices
US4629611A (en) * 1985-04-29 1986-12-16 International Business Machines Corporation Gas purifier for rare-gas fluoride lasers
JPS61258434A (ja) 1985-05-13 1986-11-15 Nec Corp 半導体装置の製造方法
JPH0682641B2 (ja) 1985-10-21 1994-10-19 日本電気株式会社 半導体集積回路装置の製造方法
US4690730A (en) * 1986-03-07 1987-09-01 Texas Instruments Incorporated Oxide-capped titanium silicide formation
US4981550A (en) * 1987-09-25 1991-01-01 At&T Bell Laboratories Semiconductor device having tungsten plugs
US4851358A (en) * 1988-02-11 1989-07-25 Dns Electronic Materials, Inc. Semiconductor wafer fabrication with improved control of internal gettering sites using rapid thermal annealing
US4981816A (en) * 1988-10-27 1991-01-01 General Electric Company MO/TI Contact to silicon
US5084417A (en) * 1989-01-06 1992-01-28 International Business Machines Corporation Method for selective deposition of refractory metals on silicon substrates and device formed thereby
JP2660359B2 (ja) * 1991-01-30 1997-10-08 三菱電機株式会社 半導体装置
KR970009867B1 (ko) * 1993-12-17 1997-06-18 현대전자산업 주식회사 반도체 소자의 텅스텐 실리사이드 형성방법
JPH08115890A (ja) 1994-10-17 1996-05-07 Fujitsu Ltd 半導体基板上への電極形成方法
JP2630290B2 (ja) * 1995-01-30 1997-07-16 日本電気株式会社 半導体装置の製造方法
JPH08213343A (ja) * 1995-01-31 1996-08-20 Sony Corp 半導体装置およびその製造方法
JPH08250463A (ja) 1995-03-07 1996-09-27 Nippon Steel Corp 半導体装置の製造方法
US5972790A (en) * 1995-06-09 1999-10-26 Tokyo Electron Limited Method for forming salicides
US5595784A (en) * 1995-08-01 1997-01-21 Kaim; Robert Titanium nitride and multilayers formed by chemical vapor deposition of titanium halides
US5830802A (en) * 1995-08-31 1998-11-03 Motorola Inc. Process for reducing halogen concentration in a material layer during semiconductor device fabrication
EP0793271A3 (en) * 1996-02-22 1998-12-02 Matsushita Electric Industrial Co., Ltd. Semiconductor device having a metal silicide film and method of fabricating the same
JPH09320990A (ja) * 1996-03-25 1997-12-12 Sharp Corp 半導体装置の製造方法
US5963828A (en) * 1996-12-23 1999-10-05 Lsi Logic Corporation Method for tungsten nucleation from WF6 using titanium as a reducing agent
JP4101901B2 (ja) * 1997-04-25 2008-06-18 シャープ株式会社 半導体装置の製造方法
KR19990041688A (ko) * 1997-11-24 1999-06-15 김규현 티타늄 샐리사이드 형성 방법

Also Published As

Publication number Publication date
EP0928021B1 (en) 2007-06-13
EP0928021A1 (en) 1999-07-07
EP0928021A4 (en) 2000-12-06
US7135386B2 (en) 2006-11-14
JP4101901B2 (ja) 2008-06-18
DE69837909D1 (de) 2007-07-26
KR20000016675A (ko) 2000-03-25
DE69837909T2 (de) 2008-02-14
US20030170967A1 (en) 2003-09-11
JPH10303145A (ja) 1998-11-13
US6562699B1 (en) 2003-05-13
WO1998049724A1 (fr) 1998-11-05

Similar Documents

Publication Publication Date Title
KR100530401B1 (ko) 저저항 게이트 전극을 구비하는 반도체 장치
US6255702B1 (en) Semiconductor device having junction depths for reducing short channel effect
US7960237B2 (en) Structure and method for mosfet with reduced extension resistance
KR100396692B1 (ko) 반도체 소자의 제조방법
EP1892759A2 (en) Method for Fabricating dual-metal gate CMOS transistors
US20050045962A1 (en) Semiconductor device having junction depths for reducing short channel effect
KR100399492B1 (ko) 실리콘층상에배선또는전극을가지는반도체장치및그배선또는전극의형성방법
US20050095867A1 (en) Method of manufacturing semiconductor device
CN101620998A (zh) 形成半导体器件中的硅化物的方法
JP3376158B2 (ja) 半導体装置の製造方法
JPH07283400A (ja) 半導体装置及びその製造方法
KR100628225B1 (ko) 반도체 소자의 제조방법
JPH0982812A (ja) 半導体装置の製造方法
JPH1154455A (ja) 半導体装置の製造方法
JP3362722B2 (ja) 半導体装置の製造方法
JPH08339970A (ja) 半導体装置及びその製造方法
JP2833530B2 (ja) 半導体装置の製造方法
JPH0611074B2 (ja) 半導体装置の製造方法
JPH10294459A (ja) 半導体装置の製造方法
US20010052626A1 (en) Method for fabricating dual-gate structure
KR100565755B1 (ko) 반도체 소자의 제조방법
JP2000223702A (ja) 半導体装置の製造方法
KR100455444B1 (ko) 반도체 소자 제조 방법
JPH05109652A (ja) 半導体装置の製造方法
JPH07147402A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

FPAY Annual fee payment

Payment date: 20120821

Year of fee payment: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

FPAY Annual fee payment

Payment date: 20130822

Year of fee payment: 11

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20140916

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20140916

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000