KR100216415B1 - Ic 테스터의 타이밍 발생장치 - Google Patents

Ic 테스터의 타이밍 발생장치 Download PDF

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Publication number
KR100216415B1
KR100216415B1 KR1019960018001A KR19960018001A KR100216415B1 KR 100216415 B1 KR100216415 B1 KR 100216415B1 KR 1019960018001 A KR1019960018001 A KR 1019960018001A KR 19960018001 A KR19960018001 A KR 19960018001A KR 100216415 B1 KR100216415 B1 KR 100216415B1
Authority
KR
South Korea
Prior art keywords
data
reset
delay means
delay
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019960018001A
Other languages
English (en)
Korean (ko)
Other versions
KR960042083A (ko
Inventor
마사카츠 스다
Original Assignee
오우라 히로시
가부시키가이샤 아드반테스트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 오우라 히로시, 가부시키가이샤 아드반테스트 filed Critical 오우라 히로시
Publication of KR960042083A publication Critical patent/KR960042083A/ko
Application granted granted Critical
Publication of KR100216415B1 publication Critical patent/KR100216415B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31922—Timing generation or clock distribution
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/131—Digitally controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Tests Of Electronic Circuits (AREA)
KR1019960018001A 1995-05-26 1996-05-27 Ic 테스터의 타이밍 발생장치 Expired - Fee Related KR100216415B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP12788395A JP3574696B2 (ja) 1995-05-26 1995-05-26 Ｉｃテスタのタイミング発生器
JP95-127883 1995-05-26

Publications (2)

Publication Number Publication Date
KR960042083A KR960042083A (ko) 1996-12-19
KR100216415B1 true KR100216415B1 (ko) 1999-08-16

Family

ID=14971014

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960018001A Expired - Fee Related KR100216415B1 (ko) 1995-05-26 1996-05-27 Ic 테스터의 타이밍 발생장치

Country Status (4)

Country Link
US (1) US5710744A (https=)
JP (1) JP3574696B2 (https=)
KR (1) KR100216415B1 (https=)
TW (1) TW296434B (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100487050B1 (ko) * 1999-02-25 2005-05-03 가부시키가이샤 어드밴티스트 반도체 테스트 시스템용 타이밍 발생 회로

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6032282A (en) * 1994-09-19 2000-02-29 Advantest Corp. Timing edge forming circuit for IC test system
JP3690899B2 (ja) * 1997-05-30 2005-08-31 富士通株式会社 クロック発生回路及び半導体装置
US5867453A (en) * 1998-02-06 1999-02-02 Taiwan Semiconductor Manufacturing Co., Ltd. Self-setup non-overlap clock generator
US6304623B1 (en) * 1998-09-03 2001-10-16 Time Domain Corporation Precision timing generator system and method
US6304119B1 (en) * 2000-12-27 2001-10-16 Chroma Ate Inc. Timing generating apparatus with self-calibrating capability
JP4567974B2 (ja) * 2002-01-18 2010-10-27 株式会社アドバンテスト 試験装置
JP2003249923A (ja) * 2002-02-25 2003-09-05 Ando Electric Co Ltd ビットエラー測定装置及びそのトリガー信号発生回路
JP4657053B2 (ja) * 2005-07-29 2011-03-23 株式会社アドバンテスト タイミング発生器及び半導体試験装置
WO2007145160A1 (ja) * 2006-06-16 2007-12-21 Panasonic Corporation データ送信装置及びデータ送信方法
JP4730611B2 (ja) * 2006-06-27 2011-07-20 横河電機株式会社 遅延時間測定方法及びこれを用いた遅延時間測定装置
JP5025723B2 (ja) * 2007-03-27 2012-09-12 株式会社アドバンテスト 試験装置
US8150648B2 (en) 2008-12-26 2012-04-03 Advantest Corporation Timing generator
JP5274660B2 (ja) * 2009-06-22 2013-08-28 株式会社アドバンテスト タイミング発生器および試験装置
JP5328920B2 (ja) * 2009-08-10 2013-10-30 株式会社アドバンテスト 差動型ｓｒフリップフロップおよびそれを用いた試験装置
JP2012138793A (ja) 2010-12-27 2012-07-19 Advantest Corp Ｓｒフリップフロップならびにそれを用いた試験装置
CN112711295B (zh) * 2019-10-25 2024-09-03 瑞昱半导体股份有限公司 时序产生器、时序产生方法以及控制芯片
US11500016B2 (en) * 2020-12-07 2022-11-15 Taiwan Semiconductor Manufacturing Company Ltd. Circuit screening system and circuit screening method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5321700A (en) * 1989-10-11 1994-06-14 Teradyne, Inc. High speed timing generator
JP2854659B2 (ja) * 1990-03-20 1999-02-03 三菱電機株式会社 半導体装置のテスト装置
JP2590741Y2 (ja) * 1993-10-18 1999-02-17 株式会社アドバンテスト 半導体試験装置用タイミング発生器

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100487050B1 (ko) * 1999-02-25 2005-05-03 가부시키가이샤 어드밴티스트 반도체 테스트 시스템용 타이밍 발생 회로

Also Published As

Publication number Publication date
JP3574696B2 (ja) 2004-10-06
TW296434B (https=) 1997-01-21
JPH08320360A (ja) 1996-12-03
US5710744A (en) 1998-01-20
KR960042083A (ko) 1996-12-19

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