JPS6344994Y2 - - Google Patents

Info

Publication number
JPS6344994Y2
JPS6344994Y2 JP1982032202U JP3220282U JPS6344994Y2 JP S6344994 Y2 JPS6344994 Y2 JP S6344994Y2 JP 1982032202 U JP1982032202 U JP 1982032202U JP 3220282 U JP3220282 U JP 3220282U JP S6344994 Y2 JPS6344994 Y2 JP S6344994Y2
Authority
JP
Japan
Prior art keywords
header
chip
thin film
semiconductor device
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982032202U
Other languages
English (en)
Other versions
JPS58135963U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1982032202U priority Critical patent/JPS58135963U/ja
Publication of JPS58135963U publication Critical patent/JPS58135963U/ja
Application granted granted Critical
Publication of JPS6344994Y2 publication Critical patent/JPS6344994Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/40247Connecting the strap to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Description

【考案の詳細な説明】 本考案は半導体装置、特に、X帯等の非常に高
い周波数帯で使用する半導体装置に関する。
半導体装置、特にX帯等の非常に高い周波数帯
で使用する半導体装置は、特性の向上を計る為
に、接地抵抗及び接地インダクタンスを下げる必
要がある。このような要求を満足させる為に、従
来は、第1図a,bに示すように、半導体チツプ
1上に形成された接地側のパツド2とケース上に
形成されたヘツダー3との間に金等の抵抗値の小
さい金属のワイヤ4を多数本接続する事によつて
行なつていた。
しかしながら、この様な従来の方法ではワイヤ
ーを多数本接続する為に作業性が悪くなる。ま
た、周波数が高くなるにしたがつて、接地抵抗及
び接地インダクタンスが高くなるという欠点を有
していた。
本考案は、上述した従来の不具合を解決して特
性がより向上した半導体装置を提供することを目
的とする。
本考案による半導体装置は、パツケージのヘツ
ダーをチツプと同一の高さにし、このヘツダーと
チツプのパツドとの間を金等の抵抗値の小さい金
属の薄膜で接続する事を特徴とする。
以下本考案を図面を参照しながらその実施例に
ついて詳細に説明する。
第2図a,bは本考案の一実施例を示すもの
で、従来と同一部分は同一の符号を付して説明す
る。本考案ではケース側のヘツダー5をチツプ1
上の接地側パツド2とほぼ同一の高さにし、ヘツ
ダー5とパツド2とを金等の抵抗値の小さいE型
に形成された金属の薄膜6で接続している。
本構成によると周波数が高くなるに従つて接地
抵抗及び接地インダクタンスが高くなるというと
いうことはない。
尚、チツプ1としてFET素子を用いた場合、
ソース電極とゲート電極とが一部入り組んでお
り、よつてE字型の金属薄板6をつかうことによ
り、ソース・ゲート間の短絡を防止できる。
【図面の簡単な説明】
第1図a,bは従来構造を示す平面図および断
面図、第2図a,bは本考案の一実施例を示す平
面図および断面図である。 1……チツプ、2……チツプ上に形成された接
地側のパツド、3……ケース上に形成されたヘツ
ダー、4……金等の抵抗値の小さい金属ワイヤ
ー、5……チツプと同一の高さに形成されたケー
ス側のヘツダー、6……金等の抵抗値の小さいE
型に形成された金属の薄膜。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) 半導体ペレツトの電極パツド部とケースのヘ
    ツダー部とをほぼ同一の高さにし、前記電極パ
    ツド部と前記ヘツダー部とを金属薄膜で接続し
    てなることを特徴とする半導体装置。 (2) 前記金属薄膜はE字型に形成されていること
    を特徴とする実用新案登録請求の範囲第1項記
    載の半導体装置。
JP1982032202U 1982-03-08 1982-03-08 半導体装置 Granted JPS58135963U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982032202U JPS58135963U (ja) 1982-03-08 1982-03-08 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982032202U JPS58135963U (ja) 1982-03-08 1982-03-08 半導体装置

Publications (2)

Publication Number Publication Date
JPS58135963U JPS58135963U (ja) 1983-09-13
JPS6344994Y2 true JPS6344994Y2 (ja) 1988-11-22

Family

ID=30043831

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982032202U Granted JPS58135963U (ja) 1982-03-08 1982-03-08 半導体装置

Country Status (1)

Country Link
JP (1) JPS58135963U (ja)

Also Published As

Publication number Publication date
JPS58135963U (ja) 1983-09-13

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