JPS6045444U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6045444U
JPS6045444U JP13621583U JP13621583U JPS6045444U JP S6045444 U JPS6045444 U JP S6045444U JP 13621583 U JP13621583 U JP 13621583U JP 13621583 U JP13621583 U JP 13621583U JP S6045444 U JPS6045444 U JP S6045444U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
semiconductor device
resin
lead
width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13621583U
Other languages
English (en)
Inventor
浩二 桑原
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP13621583U priority Critical patent/JPS6045444U/ja
Publication of JPS6045444U publication Critical patent/JPS6045444U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は従来の樹脂封止型半導体装置に用いるリードフ
レームの平面図、第２図ａは従来の樹脂封止型半導体装
置を裏面側から見た平面図、第２図すは第２図ａの側面
図、第３図は本考案の実施例の半導体装置に使用される
リードフレームの平面図、第４図ａは本考案の実施例の
半導体装置を裏面側から見た平面図、第４図すは第４図
ａの側面図である。南回において、 １・・・・・・リードフレーム、２，３．３’　、４・
・・・・・リード、５・・・・・・樹脂、６・・・・・
・半導体素子、７・・・・・・金属細線、８・・・・・
・加部分。

Claims (1)

    【実用新案登録請求の範囲】
  1. リードの主面に半導体素子が固定され、前記リードが部
    分的に樹脂で封止されてなる半導体装置において、前記
    主面の幅は、前記樹脂から露出している部分の平面の幅
    よりも大となっていることを特徴とする半導体装置。
JP13621583U 1983-09-02 1983-09-02 半導体装置 Pending JPS6045444U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13621583U JPS6045444U (ja) 1983-09-02 1983-09-02 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13621583U JPS6045444U (ja) 1983-09-02 1983-09-02 半導体装置

Publications (1)

Publication Number Publication Date
JPS6045444U true JPS6045444U (ja) 1985-03-30

Family

ID=30306347

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13621583U Pending JPS6045444U (ja) 1983-09-02 1983-09-02 半導体装置

Country Status (1)

Country Link
JP (1) JPS6045444U (ja)

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