JPS60153543U - 半導体装置用リ−ドフレ−ム - Google Patents

半導体装置用リ−ドフレ−ム

Info

Publication number
JPS60153543U
JPS60153543U JP4128884U JP4128884U JPS60153543U JP S60153543 U JPS60153543 U JP S60153543U JP 4128884 U JP4128884 U JP 4128884U JP 4128884 U JP4128884 U JP 4128884U JP S60153543 U JPS60153543 U JP S60153543U
Authority
JP
Japan
Prior art keywords
lead frame
semiconductor devices
semiconductor device
lead
recorded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4128884U
Other languages
English (en)
Inventor
松尾　常樹
Original Assignee
九州日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 九州日本電気株式会社 filed Critical 九州日本電気株式会社
Priority to JP4128884U priority Critical patent/JPS60153543U/ja
Publication of JPS60153543U publication Critical patent/JPS60153543U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は従来の半導体装置用リードフレームを示す平面
図、第２図は本考案の実施例の半導体装置用リードフレ
ームを示す平面図である。 図中、１・・・・・・従来リード、２・・・・・・ワイ
ヤ、３・・・・・・ボンデイングパ′ツド、４・・・・
・・アイランド、５・・・・・・ペレット、６・・・・
・・本考案による突き出し部有リードである。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体装置用のリード先端に突き出し部を設けることを
    特徴とする半導体装置用リードフレーム。
JP4128884U 1984-03-23 1984-03-23 半導体装置用リ−ドフレ−ム Pending JPS60153543U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4128884U JPS60153543U (ja) 1984-03-23 1984-03-23 半導体装置用リ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4128884U JPS60153543U (ja) 1984-03-23 1984-03-23 半導体装置用リ−ドフレ−ム

Publications (1)

Publication Number Publication Date
JPS60153543U true JPS60153543U (ja) 1985-10-12

Family

ID=30550968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4128884U Pending JPS60153543U (ja) 1984-03-23 1984-03-23 半導体装置用リ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS60153543U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013135132A (ja) * 2011-12-27 2013-07-08 Dainippon Printing Co Ltd 半導体装置製造用リードフレーム及び半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013135132A (ja) * 2011-12-27 2013-07-08 Dainippon Printing Co Ltd 半導体装置製造用リードフレーム及び半導体装置の製造方法

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