JPS6037253U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6037253U
JPS6037253U JP13021783U JP13021783U JPS6037253U JP S6037253 U JPS6037253 U JP S6037253U JP 13021783 U JP13021783 U JP 13021783U JP 13021783 U JP13021783 U JP 13021783U JP S6037253 U JPS6037253 U JP S6037253U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
island portion
semiconductor device
semiconductor element
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13021783U
Other languages
English (en)
Inventor
大津　寿招
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP13021783U priority Critical patent/JPS6037253U/ja
Publication of JPS6037253U publication Critical patent/JPS6037253U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は従来のリードフレームを説明する半導体装置の
平面図、第２図、第３図はそれぞれボンディングを行っ
た後の二つの従来の例を示す部分断面図、第４図はボン
ディングを行った後の従来のリードフレームの一部を拡
大した平面図、第５図は本考案の一実施例によるリード
フレームを示す平面図である。 １・・・・・・アイランド部、２・・・・・・リード、
３・・・・・・樹脂、４・・・・・・半導体チップ、５
・・・・・・金属細線、６・・・・・・電極。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体素子が取り付けられたアイランド部と、このアイ
    ランド部の周辺に配置され前記半導体素子の各電極と金
    属細線で結線される複数のリードとを備えた半導体装置
    において、各リードの前記アイランド部側の先端部分の
    形状が円弧状となるように成形されていることを特徴と
    する半導体装置。
JP13021783U 1983-08-23 1983-08-23 半導体装置 Pending JPS6037253U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13021783U JPS6037253U (ja) 1983-08-23 1983-08-23 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13021783U JPS6037253U (ja) 1983-08-23 1983-08-23 半導体装置

Publications (1)

Publication Number Publication Date
JPS6037253U true JPS6037253U (ja) 1985-03-14

Family

ID=30294793

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13021783U Pending JPS6037253U (ja) 1983-08-23 1983-08-23 半導体装置

Country Status (1)

Country Link
JP (1) JPS6037253U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0245969A (ja) * 1988-08-06 1990-02-15 Toshiba Corp 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0245969A (ja) * 1988-08-06 1990-02-15 Toshiba Corp 半導体装置の製造方法

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