JPH0650803B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH0650803B2
JPH0650803B2 JP61138827A JP13882786A JPH0650803B2 JP H0650803 B2 JPH0650803 B2 JP H0650803B2 JP 61138827 A JP61138827 A JP 61138827A JP 13882786 A JP13882786 A JP 13882786A JP H0650803 B2 JPH0650803 B2 JP H0650803B2
Authority
JP
Japan
Prior art keywords
thin metal
metal wire
semiconductor device
wire
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61138827A
Other languages
English (en)
Other versions
JPS62294304A (ja
Inventor
雄二 角田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61138827A priority Critical patent/JPH0650803B2/ja
Publication of JPS62294304A publication Critical patent/JPS62294304A/ja
Publication of JPH0650803B2 publication Critical patent/JPH0650803B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6611—Wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/4917—Crossed wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関し、特に半導体チップに搭載し
た内部回路と回路部品とを接続する金属細線に電磁的に
結合したループ状の金属細線を少くとも一つを有する半
導体装置に関する。
〔従来の技術〕 従来、半導体チップに搭載した内部回路と回路部品との
間を接続する金属細線は、その長さ、直径，本数などが
インダクタンスを決めるために、半導体装置のマイクロ
波特性に直接影響を与える。従って、金属細線の組立を
管理することは、非常に重要なことである。
第３図（ａ），（ｂ）は従来の半導体装置の一例の平面
図及び側面図である。
従来例の半導体装置は、半導体チップ２に搭載した内部
回路と回路部品３との間を金属細線１によって、単に、
接続した構造であった。
〔発明が解決しようとする問題点〕
上述した従来の半導体装置は、半導体チップに搭載した
内部回路と回路部品とを、単に、金属細線で接続するだ
けであるので、その金属細線の長さ、接続形状は、一度
結線した後は修正が難しく、そのインダクタンスは、結
線した時点でほぼ決定していまう。従って、従来の半導
体装置のマイクロ波特性をその金属細線のもつインダク
タンスで調整することは非常に難しいという欠点があ
る。
本発明の目的は、半導体チップに搭載した内部回路と回
路部品との間を接続する金属細線の長さや形状を変える
ことなくマイクロ波特性を調整することができる半導体
装置を提供することにある。
〔問題点を解決するための手段〕
本発明の半導体装置は、半導体チップに搭載した内部回
路の接続点と回路部品の接続点との間を接続する金属細
線と、両端が接地板に接続されてループ状をなし前記金
属細線と接触せずかつ近接して交差し前記金属細線と電
磁的に結合する少くとも一つの他の金属細線とを有して
成る。
〔実施例〕
次に、本発明の実施例について図面を参照して説明す
る。
第１図（ａ），（ｂ）及び第２図（ａ），（ｂ）はそれ
ぞれ本発明の半導体装置の第１及び第２の実施例の平面
図及び側面図である。
第１の実施例は、第１図（ａ），（ｂ）に示すように、
半導体チップ２の内部回路と回路部品３との間を接続す
る金属細線１に電磁的に結合するループ状の金属細線４
の両端が接地板５に接続されるようにして配置されてい
る。
従って、このループ状の金属細線４と金属細線との間隔
を変えることで、半導体装置のマイクロ波特性を調整す
ることができる。
又、第２の実施例は、第２図（ａ），（ｂ）に示すよう
に、ループ状の金属細線４ａ，４ｂを設けたもので、ル
ープ状の金属細線４ａ，４ｂのそれぞれの位置や金属細
線１との間隔を変えることでマイクロ波特性を調整する
ことができる。
〔発明の効果〕
以上説明したように本発明は、ループ状の金属細線を少
くとも一つ、半導体チップの内部回路と回路部品との間
を接続する金属細線に電磁的に結合させることにより、
半導体装置のマイクロ波特性を金属細線を設けた後に調
整することができるという効果がある。
【図面の簡単な説明】
第１図（ａ），（ｂ）及び第２図（ａ），（ｂ）はそれ
ぞれ本発明の半導体装置の第１及び第２の実施例の平面
図及び側面図、第３図（ａ），（ｂ）は従来の半導体装
置の一例の平面図及び側面図である。 １……金属細線、２……半導体チップ、３……回路部
品、４，４ａ，４ｂ……金属細線、５……接地板。

Claims (1)

    【特許請求の範囲】
  1. 【請求項１】基板上に固着された半導体チップに搭載し
    た内部回路の接続点と同じくこの基板上に固着された回
    路部品の接続点との間を接続する金属細線と、両端がそ
    れぞれ前記基板上に設けた接地板に接続されてループ状
    をなし前記金属細線と接触せずかつ近接して交差し前記
    金属細線と電磁的に結合する少くとも一つの他の金属細
    線とを有することを特徴とする半導体装置。
JP61138827A 1986-06-13 1986-06-13 半導体装置 Expired - Lifetime JPH0650803B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61138827A JPH0650803B2 (ja) 1986-06-13 1986-06-13 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61138827A JPH0650803B2 (ja) 1986-06-13 1986-06-13 半導体装置

Publications (2)

Publication Number Publication Date
JPS62294304A JPS62294304A (ja) 1987-12-21
JPH0650803B2 true JPH0650803B2 (ja) 1994-06-29

Family

ID=15231150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61138827A Expired - Lifetime JPH0650803B2 (ja) 1986-06-13 1986-06-13 半導体装置

Country Status (1)

Country Link
JP (1) JPH0650803B2 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5133776B2 (ja) * 2008-05-22 2013-01-30 アンリツ株式会社 電子部品の接続構造

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010081Y2 (ja) * 1978-06-16 1985-04-08 沖電気工業株式会社 マイクロ波集積回路

Also Published As

Publication number Publication date
JPS62294304A (ja) 1987-12-21

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