JPS6128232B2 - - Google Patents

Info

Publication number
JPS6128232B2
JPS6128232B2 JP53109884A JP10988478A JPS6128232B2 JP S6128232 B2 JPS6128232 B2 JP S6128232B2 JP 53109884 A JP53109884 A JP 53109884A JP 10988478 A JP10988478 A JP 10988478A JP S6128232 B2 JPS6128232 B2 JP S6128232B2
Authority
JP
Japan
Prior art keywords
polysilicon
layer
silicide
metal
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53109884A
Other languages
English (en)
Other versions
JPS5469972A (en
Inventor
Hainritsuhi Gaensurin Furitsutsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5469972A publication Critical patent/JPS5469972A/ja
Publication of JPS6128232B2 publication Critical patent/JPS6128232B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/147—Silicides

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【発明の詳細な説明】 本発明は集積回路の製造方法に関し、さらに具
体的には２つのポリシリコン層間にケイ化物形成
用金属層を含むMOSFETポリシリコン自己整列
構造体の製造に関する。
集積回路製造中、特に自己整列ゲートのための
製造工程においては、ゲート素子に対して従来ポ
リシリコンが使用されている。なんとなればゲー
ト素子はソース及びドレイン電極を形成する拡散
工程中に高温にさらされるが、ポリシリコンは耐
火金属と同様に高温度に耐えるからである。同様
に自己整列ゲート・プロセスにおいては構造体の
上部上に後に配向される金属線からゲートを分離
するべくゲート上に酸化物を与えるために再酸化
工程が遂行されるが、この酸化物は耐火金属上よ
りもポリシリコン上により良好に成長される。ポ
リシリコン・ゲート材料を使用したこの型の従来
技術の構造体は第１図に示されている。
耐火金属ゲートに関するポリシリコン・ゲート
の欠点は信号を分配するための２次元の自由度を
与えるために複数の金属線より成る上部層にゲー
トを接続する事が多くの応用で望まれている点に
ある。ポリシリコンがゲート材料として使用され
る時、金属及びポリシリコンのシート抵抗（オー
ム／cm2）間に不一致が存在し、回路速度の減少の
如き非効率を生じる。この欠点は従来技術におい
て認識されており、固有抵抗の不一致を避けるた
めの試みがなされている。IBM Technical
Disclosure Bulletin、Vol.17、No.6、November
1974中のV.L、Rideout著の“Reducing the
Sheet Resistance of Polysilicon Lines In
Integrated Circuit”と題する刊行物はポリシリ
コンの高温安定性と２酸化シリコンがポリシリコ
ンに付着され、成長され得るという事実のため
に、ポリシリコン線を多重層集積回路に使用する
事に向けられている。この刊行物はポリシリコン
線の抵抗は線の露出表面上に高導電性のケイ化物
層を形成する事によつて減少され得る事を開示し
ている。即ち、金属とポリシリコンが合体される
個所にケイ化物が形成される。さらに具体的にポ
リシリコン線は基板上の２酸化ケイ素上に形成さ
れ、ハフニウムの如き金属が全体の構造体上に付
着され、ケイ化ハフニウムがポリシリコン線上に
形成されるが、ハフニウムが２酸化ケイ素上では
反応されずに残され、食刻により除去される。次
いで２酸化ケイ素の絶縁層が構造体上に付着さ
れ、アルミニウム層が２酸化ケイ素上に形成され
る。
本発明はポリシリコンの第１の層が形成され、
次いでケイ化物形成用金属層が第１のポリシリコ
ン層上に形成され、第２のポリシリコン層がケイ
化物形成用金属層上に形成される如くしてゲート
構造体が自己整列ゲート・プロセスの間に形成さ
れる点で従来技法から区別される。マスキングの
後のその後の再酸化プロセスの間、金属層の両面
はポリシリコン層と反応し、ケイ化物領域が形成
される。ケイ化物領域は後に形成される金属層と
整合した接続を与えるために利用可能であり、ゲ
ート構造体は温度安定性を有し、再酸化プロセス
中の良好な酸化物成長を与える上方ポリシリコン
領域を有する。
本発明の目的は高温度安定性及び低シート抵抗
を与える集積回路のためのゲート構造体を与える
事にある。
本発明の他の目的はその上に酸化物が効果的に
形成される低シート抵抗ゲート構造体を与える事
にある。
本発明のさらに他の目的はケイ素基板に対する
仕事関数の差を維持する集積回路のためにゲート
構造体を与える事にある。
本発明のさらに他の目的ポリシリコンと反応し
てケイ化物を形成する、２つのポリシリコン層間
にはさまれたケイ化物形成金属層を含む集積回路
のためのゲート構造体を与える事にある。
好ましい実施例の説明 第１図を参照するに、代表的ポリシリコン自己
整列ゲートはｐ−型基板１０とｎ＋型ソース及び
ドレイン領域１２及び１４を含むものとして示さ
れている。ｎ＋ポリシリコンゲート１６は２酸化
ケイ素（SiO2）１８の絶縁層中に埋没されてお
り、金属化層２０が構造体の最上部に存在し得
る。
耐火金属でなくポリシリコン材料がゲート１６
が一部をなす層のために選択された。なんとなれ
ばポリシリコンは高温度で安定で、２酸化ケイ素
がその上に熱的に成長され得、化学的に蒸着され
得るからである。しかしながら、ポリシリコンの
シート抵抗は上部金属層２０のシート抵抗よりも
数桁高いので、導電率の不整合を生じ、この事は
ゲート１６が一部であるポリシリコン層が通常の
金属層２０と共に相互接続線として使用される時
に回路速度の減少の如き不効率に導く。導電率整
合のために従来選択された耐火金属ゲートの使用
はその上に該金属の酸化物が容易に成長され得な
いという欠点を有する。
第２図に示される改良構造体は類似の基板１
０、及びドレイン領域１２及び１４、並びに絶縁
層１８をする。しかしながらゲートは第１図に示
された層の厚さの略半分のポリシリコン２２の第
１の層を含む。層２２が付着された後、モリブデ
ン、タングステンもしくはチタンの如きケイ化物
形成用金属の薄膜層２４がフラツシユ付着によつ
てポリシリコン２２上に付着される。次に、層２
２と略同一の厚さのポリシリコンの第２の層２６
が金属層２４上に付着される。本発明の重要な利
点は３つの層２２，２４及び２６が通常のゲー
ト・プロセスと同一の製造段階を使用して付着さ
れる点にある。即ち３つの層の付着は、付着のた
めの真空環境を中断する事なく遂行され得、従つ
て唯一回の真空ポンプの排気が必要とされる。
３層構造体は次にマスキング工程により画定さ
れ、ゲート構造体（層２２，２４及び２６より成
る）が第２図に示された如く形成される。次いで
再酸化プロセスが遂行され、層２６上に２酸化シ
リコン層が形成され、このプロセス中の高温が金
属層２４とポリシリコン層２２及び２６を２つの
反応面で反応せしめ、金属の導電率を有するケイ
化物が形成される。
上記の論議は本発明がMOSFETに対するゲー
ト構造体を製造するのに使用されるものとして説
明した。本発明はしかしながらこの応用に制限さ
れるものではなく、さらに一般にたとえばバイポ
ーラ装置の製造及び多重層回路中のポリシリコン
導線のために使用され得る。従つてポリシリコン
線は本発明の原理に従つて、ポリシリコンの温度
安定性及び再酸化可能性並びにケイ化物の低シー
ト抵抗を取り入れる如く、サンドイツチされたケ
イ化物層を伴つて製造され得る。
本発明の他の集積回路応用は一装置セル・メモ
リ及び論理配列体を含む。一装置セル中の本発明
のケイ化物構造体はビツト線キヤパシタンスを増
大する事なく低シート抵抗を保持し、これによつ
て改良されたカツプリングの結果としての装置感
度が改良される。
【図面の簡単な説明】
第１図は従来の技法の集積回路のためのゲート
構造体の図である。第２図は本発明の原理に従う
２つのポリシリコン層間にはさまれたケイ化物形
成金属を有する集積回路のためのゲート構造体の
図である。 １０…基板、１２，１４…ソース及びドレイ
ン、２２…第１のポリシリコン層、２４…ケイ化
物層、２６…第２のポリシリコン層、１８…
SiO2、２０…Ａ層。

Claims (1)

  1. 【特許請求の範囲】 １ シリコン半導体基板上の絶縁物層の上に第１
    のポリシリコン層を付着する工程と、 上記第１のポリシリコン層の上にケイ化物形成
    用金属層を付着する工程と、 上記ケイ化物形成用金属層の上に第２のポリシ
    リコン層を付着する工程と、 上記第１のポリシリコン層、上記ケイ化物形成
    用金属層及び上記第２のポリシリコン層より成る
    ３層構造の所定部分を残すように他を除去する工
    程と、 上記シリコン半導体基板及び上記残された３層
    構造を覆つて２酸化シリコン層を成長させる再酸
    化工程とを含み、該再酸化工程の間に上記第１及
    び第２のポリシリコン層と上記ケイ化物形成用金
    属層とを反応させてケイ化物を形成することを特
    徴とする、集積回路のためのポリシリコン及び金
    属ケイ化物の導電性組合わせ構造体を製造する方
    法。
JP10988478A 1977-11-11 1978-09-08 Method of fabricating conductive polysilicon and silicon metal coupling structure Granted JPS5469972A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/850,586 US4128670A (en) 1977-11-11 1977-11-11 Fabrication method for integrated circuits with polysilicon lines having low sheet resistance

Publications (2)

Publication Number Publication Date
JPS5469972A JPS5469972A (en) 1979-06-05
JPS6128232B2 true JPS6128232B2 (ja) 1986-06-28

Family

ID=25308566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10988478A Granted JPS5469972A (en) 1977-11-11 1978-09-08 Method of fabricating conductive polysilicon and silicon metal coupling structure

Country Status (6)

Country Link
US (1) US4128670A (ja)
EP (1) EP0002165B1 (ja)
JP (1) JPS5469972A (ja)
CA (1) CA1092726A (ja)
DE (1) DE2861516D1 (ja)
IT (1) IT1160028B (ja)

Families Citing this family (89)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5487175A (en) * 1977-12-23 1979-07-11 Cho Lsi Gijutsu Kenkyu Kumiai Method of fabricating semiconductor
DE2802838A1 (de) * 1978-01-23 1979-08-16 Siemens Ag Mis-feldeffekttransistor mit kurzer kanallaenge
US4230773A (en) * 1978-12-04 1980-10-28 International Business Machines Corporation Decreasing the porosity and surface roughness of ceramic substrates
US4276557A (en) * 1978-12-29 1981-06-30 Bell Telephone Laboratories, Incorporated Integrated semiconductor circuit structure and method for making it
US4332839A (en) * 1978-12-29 1982-06-01 Bell Telephone Laboratories, Incorporated Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide
USRE32207E (en) * 1978-12-29 1986-07-15 At&T Bell Laboratories Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide
US4329706A (en) * 1979-03-01 1982-05-11 International Business Machines Corporation Doped polysilicon silicide semiconductor integrated circuit interconnections
DE2918888C2 (de) * 1979-05-10 1984-10-18 Siemens AG, 1000 Berlin und 8000 München MNOS-Speicherzelle und Verfahren zu ihrem Betrieb sowie zu ihrer Herstellung
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IT1160028B (it) 1987-03-04
DE2861516D1 (en) 1982-02-25
EP0002165B1 (fr) 1982-01-06
JPS5469972A (en) 1979-06-05
US4128670A (en) 1978-12-05
CA1092726A (en) 1980-12-30
IT7829280A0 (it) 1978-10-31

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