JPS5679450A - Electrode and wiring of semiconductor device - Google Patents

Electrode and wiring of semiconductor device

Info

Publication number
JPS5679450A
JPS5679450A JP15650679A JP15650679A JPS5679450A JP S5679450 A JPS5679450 A JP S5679450A JP 15650679 A JP15650679 A JP 15650679A JP 15650679 A JP15650679 A JP 15650679A JP S5679450 A JPS5679450 A JP S5679450A
Authority
JP
Japan
Prior art keywords
layer
wiring
electrode
polycrystalline
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15650679A
Other languages
Japanese (ja)
Inventor
Natsuo Tsubouchi
Haruhiko Abe
Masao Nagatomo
Hiroji Harada
Junichi Mihashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15650679A priority Critical patent/JPS5679450A/en
Priority to DE19803042503 priority patent/DE3042503A1/en
Publication of JPS5679450A publication Critical patent/JPS5679450A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4827—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To lower the resistivity of an electrode and a wiring by sandwitching a high-melting point metal layer made of Mo, W or the like with two layers of polycrystalline Si while Ti layer is interposed therebetween for better adhesivity when the electrode or the wiring of a semiconductor device is formed. CONSTITUTION:When an electrode or a wiring is formed on a ground substrate 1, initially a polycrystalline Si layer 2 is entirely grown in the gaseous phase and then, a Ti layer 3 is applied thereon. Then, a Mo layer 4 and again a Ti layer 5 are formed on the layer 3 and then a polycrystalline Si layer 6 is grown in the gaseous phase on the top-most layer. Thereafter, with a resist as mask, the layers are treated in a gas plasma of CF4 by photolithography to remove unnecessary parts selectively. In this manner, the resistivity of the electrode wiring can be lowered employing the doping of impurities and a well self-matching polycrystalline Si. Or it may be accepted to wrap the polycrystaline Si with these high-melting point metals.
JP15650679A 1979-11-30 1979-11-30 Electrode and wiring of semiconductor device Pending JPS5679450A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP15650679A JPS5679450A (en) 1979-11-30 1979-11-30 Electrode and wiring of semiconductor device
DE19803042503 DE3042503A1 (en) 1979-11-30 1980-11-11 Integrated circuit with good connection between layers - has high m.pt. metal layer sandwiched between two polycrystalline layers of silicon

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15650679A JPS5679450A (en) 1979-11-30 1979-11-30 Electrode and wiring of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5679450A true JPS5679450A (en) 1981-06-30

Family

ID=15629243

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15650679A Pending JPS5679450A (en) 1979-11-30 1979-11-30 Electrode and wiring of semiconductor device

Country Status (2)

Country Link
JP (1) JPS5679450A (en)
DE (1) DE3042503A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61224435A (en) * 1985-03-29 1986-10-06 Toshiba Corp Semiconductor device
JPS62188160U (en) * 1986-05-21 1987-11-30
JPS6346763A (en) * 1986-08-15 1988-02-27 Nec Corp Solid state image sensor and manufacture thereof

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR890005261B1 (en) * 1985-08-28 1989-12-20 미쓰비시 뎅기 가부시끼가이샤 A liquid filtering device
US4725877A (en) * 1986-04-11 1988-02-16 American Telephone And Telegraph Company, At&T Bell Laboratories Metallized semiconductor device including an interface layer

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3617816A (en) * 1970-02-02 1971-11-02 Ibm Composite metallurgy stripe for semiconductor devices
US3765970A (en) * 1971-06-24 1973-10-16 Rca Corp Method of making beam leads for semiconductor devices
NL7117429A (en) * 1971-12-18 1973-06-20
US4106051A (en) * 1972-11-08 1978-08-08 Ferranti Limited Semiconductor devices
DE2315710C3 (en) * 1973-03-29 1975-11-13 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Method for manufacturing a semiconductor device
US4042953A (en) * 1973-08-01 1977-08-16 Micro Power Systems, Inc. High temperature refractory metal contact assembly and multiple layer interconnect structure
JPS5235983A (en) * 1975-09-17 1977-03-18 Hitachi Ltd Manufacturing method of field effective transistor
US4128670A (en) * 1977-11-11 1978-12-05 International Business Machines Corporation Fabrication method for integrated circuits with polysilicon lines having low sheet resistance

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61224435A (en) * 1985-03-29 1986-10-06 Toshiba Corp Semiconductor device
JPS62188160U (en) * 1986-05-21 1987-11-30
JPS6346763A (en) * 1986-08-15 1988-02-27 Nec Corp Solid state image sensor and manufacture thereof

Also Published As

Publication number Publication date
DE3042503A1 (en) 1981-06-19

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