JPH10247725A5 - - Google Patents
Info
- Publication number
- JPH10247725A5 JPH10247725A5 JP1997050312A JP5031297A JPH10247725A5 JP H10247725 A5 JPH10247725 A5 JP H10247725A5 JP 1997050312 A JP1997050312 A JP 1997050312A JP 5031297 A JP5031297 A JP 5031297A JP H10247725 A5 JPH10247725 A5 JP H10247725A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- impurity
- conductive layer
- oxide film
- conductivity type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9050312A JPH10247725A (ja) | 1997-03-05 | 1997-03-05 | 半導体装置およびその製造方法 |
| TW086108609A TW344899B (en) | 1997-03-05 | 1997-06-19 | Semiconductor device and process for producing the same |
| KR1019970040214A KR19980079317A (ko) | 1997-03-05 | 1997-08-22 | 반도체 장치 및 그 제조방법 |
| FR9712478A FR2760566B1 (fr) | 1997-03-05 | 1997-10-07 | Dispositif a semiconducteurs ayant plusieurs types de transistors formes dans une puce et procede pour sa fabrication |
| DE19745249A DE19745249A1 (de) | 1997-03-05 | 1997-10-13 | Halbleiterbauelement und Herstellungsverfahren dafür |
| CNB971222606A CN1162912C (zh) | 1997-03-05 | 1997-11-12 | 半导体装置及其制造方法 |
| FR9808607A FR2766617B1 (fr) | 1997-03-05 | 1998-07-06 | Dispositif a semiconducteurs ayant plusieurs types de transistors formes dans une puce et procede pour sa fabrication |
| US09/366,732 US6492690B2 (en) | 1997-03-05 | 1999-08-04 | Semiconductor device having control electrodes with different impurity concentrations |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9050312A JPH10247725A (ja) | 1997-03-05 | 1997-03-05 | 半導体装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10247725A JPH10247725A (ja) | 1998-09-14 |
| JPH10247725A5 true JPH10247725A5 (enExample) | 2004-12-02 |
Family
ID=12855386
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9050312A Pending JPH10247725A (ja) | 1997-03-05 | 1997-03-05 | 半導体装置およびその製造方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6492690B2 (enExample) |
| JP (1) | JPH10247725A (enExample) |
| KR (1) | KR19980079317A (enExample) |
| CN (1) | CN1162912C (enExample) |
| DE (1) | DE19745249A1 (enExample) |
| FR (2) | FR2760566B1 (enExample) |
| TW (1) | TW344899B (enExample) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4199338B2 (ja) | 1998-10-02 | 2008-12-17 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
| US7220281B2 (en) | 1999-08-18 | 2007-05-22 | Intrinsic Therapeutics, Inc. | Implant for reinforcing and annulus fibrosis |
| KR100513445B1 (ko) * | 1999-09-10 | 2005-09-07 | 삼성전자주식회사 | 반도체 장치의 제조방법 |
| JP2001110908A (ja) * | 1999-10-06 | 2001-04-20 | Nec Corp | 半導体装置及びその製造方法 |
| JP4823408B2 (ja) | 2000-06-08 | 2011-11-24 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体記憶装置 |
| US6833329B1 (en) | 2000-06-22 | 2004-12-21 | Micron Technology, Inc. | Methods of forming oxide regions over semiconductor substrates |
| US6649543B1 (en) | 2000-06-22 | 2003-11-18 | Micron Technology, Inc. | Methods of forming silicon nitride, methods of forming transistor devices, and transistor devices |
| US6956757B2 (en) | 2000-06-22 | 2005-10-18 | Contour Semiconductor, Inc. | Low cost high density rectifier matrix memory |
| US6686298B1 (en) | 2000-06-22 | 2004-02-03 | Micron Technology, Inc. | Methods of forming structures over semiconductor substrates, and methods of forming transistors associated with semiconductor substrates |
| US6660657B1 (en) | 2000-08-07 | 2003-12-09 | Micron Technology, Inc. | Methods of incorporating nitrogen into silicon-oxide-containing layers |
| JP2002368144A (ja) * | 2001-06-13 | 2002-12-20 | Hitachi Ltd | 不揮発性半導体記憶装置およびその製造方法 |
| US6878585B2 (en) | 2001-08-29 | 2005-04-12 | Micron Technology, Inc. | Methods of forming capacitors |
| US6723599B2 (en) | 2001-12-03 | 2004-04-20 | Micron Technology, Inc. | Methods of forming capacitors and methods of forming capacitor dielectric layers |
| DE10209334A1 (de) * | 2002-03-02 | 2003-10-09 | Infineon Technologies Ag | Füllverfahren für Mulden auf einer Halbleiterscheibe |
| US7112857B2 (en) * | 2004-07-06 | 2006-09-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Devices with different electrical gate dielectric thicknesses but with substantially similar physical configurations |
| JP2006049365A (ja) * | 2004-07-30 | 2006-02-16 | Nec Electronics Corp | 半導体装置 |
| JP2006059880A (ja) * | 2004-08-17 | 2006-03-02 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| KR100680488B1 (ko) * | 2005-01-13 | 2007-02-08 | 주식회사 하이닉스반도체 | 플래쉬 메모리 소자의 제조방법 |
| US20060237778A1 (en) * | 2005-04-22 | 2006-10-26 | Mu-Yi Liu | Non-volatile semiconductor memory cell and method of manufacturing the same |
| US7485528B2 (en) * | 2006-07-14 | 2009-02-03 | Micron Technology, Inc. | Method of forming memory devices by performing halogen ion implantation and diffusion processes |
| US8159895B2 (en) | 2006-08-17 | 2012-04-17 | Broadcom Corporation | Method and system for split threshold voltage programmable bitcells |
| JP4421629B2 (ja) * | 2007-04-25 | 2010-02-24 | 株式会社東芝 | 半導体装置の製造方法 |
| US7718496B2 (en) * | 2007-10-30 | 2010-05-18 | International Business Machines Corporation | Techniques for enabling multiple Vt devices using high-K metal gate stacks |
| US7933133B2 (en) * | 2007-11-05 | 2011-04-26 | Contour Semiconductor, Inc. | Low cost, high-density rectifier matrix memory |
| WO2011074407A1 (en) | 2009-12-18 | 2011-06-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| JP5778900B2 (ja) * | 2010-08-20 | 2015-09-16 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| US9224475B2 (en) * | 2012-08-23 | 2015-12-29 | Sandisk Technologies Inc. | Structures and methods for making NAND flash memory |
| JP5564588B2 (ja) * | 2013-02-07 | 2014-07-30 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US9443862B1 (en) | 2015-07-24 | 2016-09-13 | Sandisk Technologies Llc | Select gates with select gate dielectric first |
| US9613971B2 (en) | 2015-07-24 | 2017-04-04 | Sandisk Technologies Llc | Select gates with central open areas |
| CN107026192B (zh) * | 2016-02-02 | 2020-05-29 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置的制造方法 |
| CN114005746B (zh) * | 2021-10-29 | 2025-08-29 | 上海华力微电子有限公司 | 一种高压器件的栅氧层及其制造方法 |
| CN116779615B (zh) * | 2023-08-23 | 2023-11-07 | 合肥晶合集成电路股份有限公司 | 一种集成半导体器件及其制作方法 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4249968A (en) * | 1978-12-29 | 1981-02-10 | International Business Machines Corporation | Method of manufacturing a metal-insulator-semiconductor utilizing a multiple stage deposition of polycrystalline layers |
| JPS56120166A (en) * | 1980-02-27 | 1981-09-21 | Hitachi Ltd | Semiconductor ic device and manufacture thereof |
| US4745079A (en) * | 1987-03-30 | 1988-05-17 | Motorola, Inc. | Method for fabricating MOS transistors having gates with different work functions |
| US4912676A (en) * | 1988-08-09 | 1990-03-27 | Texas Instruments, Incorporated | Erasable programmable memory |
| US4914046A (en) * | 1989-02-03 | 1990-04-03 | Motorola, Inc. | Polycrystalline silicon device electrode and method |
| US5021356A (en) | 1989-08-24 | 1991-06-04 | Delco Electronics Corporation | Method of making MOSFET depletion device |
| DE69006978T2 (de) * | 1989-08-24 | 1994-06-09 | Delco Electronics Corp | MOSFET-Verarmungsanordnung. |
| JP2978345B2 (ja) * | 1992-11-26 | 1999-11-15 | 三菱電機株式会社 | 半導体装置の製造方法 |
| US5340764A (en) * | 1993-02-19 | 1994-08-23 | Atmel Corporation | Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer |
| JPH06342881A (ja) | 1993-06-02 | 1994-12-13 | Toshiba Corp | 半導体装置およびその製造方法 |
| EP0639856A1 (en) * | 1993-08-20 | 1995-02-22 | Texas Instruments Incorporated | Method of doping a polysilicon layer and semiconductor device obtained |
| JPH07263680A (ja) * | 1994-03-24 | 1995-10-13 | Hitachi Ltd | 半導体装置の製造方法 |
| JP3444687B2 (ja) * | 1995-03-13 | 2003-09-08 | 三菱電機株式会社 | 不揮発性半導体記憶装置 |
| US5480830A (en) * | 1995-04-04 | 1996-01-02 | Taiwan Semiconductor Manufacturing Company Ltd. | Method of making depleted gate transistor for high voltage operation |
| JP3243151B2 (ja) * | 1995-06-01 | 2002-01-07 | 東芝マイクロエレクトロニクス株式会社 | 半導体装置の製造方法 |
| DE69528971D1 (de) | 1995-06-30 | 2003-01-09 | St Microelectronics Srl | Herstellungsverfahren eines Schaltkreises, der nichtflüchtige Speicherzellen und Randtransistoren von mindestens zwei unterschiedlichen Typen enthält, und entsprechender IC |
| US5753958A (en) * | 1995-10-16 | 1998-05-19 | Sun Microsystems, Inc. | Back-biasing in asymmetric MOS devices |
| US5767558A (en) * | 1996-05-10 | 1998-06-16 | Integrated Device Technology, Inc. | Structures for preventing gate oxide degradation |
-
1997
- 1997-03-05 JP JP9050312A patent/JPH10247725A/ja active Pending
- 1997-06-19 TW TW086108609A patent/TW344899B/zh not_active IP Right Cessation
- 1997-08-22 KR KR1019970040214A patent/KR19980079317A/ko not_active Ceased
- 1997-10-07 FR FR9712478A patent/FR2760566B1/fr not_active Expired - Fee Related
- 1997-10-13 DE DE19745249A patent/DE19745249A1/de not_active Withdrawn
- 1997-11-12 CN CNB971222606A patent/CN1162912C/zh not_active Expired - Fee Related
-
1998
- 1998-07-06 FR FR9808607A patent/FR2766617B1/fr not_active Expired - Fee Related
-
1999
- 1999-08-04 US US09/366,732 patent/US6492690B2/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH10247725A5 (enExample) | ||
| KR0161398B1 (ko) | 고내압 트랜지스터 및 그 제조방법 | |
| US6482698B2 (en) | Method of manufacturing an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip | |
| US6933560B2 (en) | Power devices and methods for manufacturing the same | |
| US6759717B2 (en) | CMOS integrated circuit device with LDD n-channel transistor and non-LDD p-channel transistor | |
| JPH09270466A (ja) | 半導体装置及びその製造方法 | |
| JPH10313098A5 (enExample) | ||
| US4637128A (en) | Method of producing semiconductor device | |
| US5672530A (en) | Method of making MOS transistor with controlled shallow source/drain junction | |
| US6261885B1 (en) | Method for forming integrated circuit gate conductors from dual layers of polysilicon | |
| US5898006A (en) | Method of manufacturing a semiconductor device having various types of MOSFETS | |
| EP1142014B1 (en) | A method of manufacturing a peripheral transistor of a non-volatile memory | |
| JPH0210766A (ja) | Mosおよびcmosromメモリをプログラミングする方法 | |
| JP2000068499A (ja) | 半導体装置とその製造方法 | |
| US5850360A (en) | High-voltage N-channel MOS transistor and associated manufacturing process | |
| JPH02105469A (ja) | Mis型半導体装置 | |
| US7439596B2 (en) | Transistors for semiconductor device and methods of fabricating the same | |
| US20250359139A1 (en) | Substrate device | |
| KR100899533B1 (ko) | 고전압 소자 및 그 제조방법 | |
| KR100602128B1 (ko) | 고전압 트랜지스터의 제조 방법 | |
| KR100821091B1 (ko) | 반도체 소자의 제조 방법 | |
| US20230178548A1 (en) | Semiconductor device having sti regions | |
| KR100333356B1 (ko) | 반도체장치의 제조방법 | |
| JPH02219237A (ja) | Mis型半導体装置 | |
| JPH0479336A (ja) | 半導体装置の製造方法 |