JPH0247862B2 - - Google Patents

Info

Publication number
JPH0247862B2
JPH0247862B2 JP57067139A JP6713982A JPH0247862B2 JP H0247862 B2 JPH0247862 B2 JP H0247862B2 JP 57067139 A JP57067139 A JP 57067139A JP 6713982 A JP6713982 A JP 6713982A JP H0247862 B2 JPH0247862 B2 JP H0247862B2
Authority
JP
Japan
Prior art keywords
area
cell array
general
circuit
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57067139A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58190036A (ja
Inventor
Nobutake Matsumura
Shinji Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57067139A priority Critical patent/JPS58190036A/ja
Priority to DE8383302324T priority patent/DE3378147D1/de
Priority to EP83302324A priority patent/EP0093003B1/en
Priority to IE941/83A priority patent/IE54711B1/en
Publication of JPS58190036A publication Critical patent/JPS58190036A/ja
Priority to US07/088,983 priority patent/US4809029A/en
Publication of JPH0247862B2 publication Critical patent/JPH0247862B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits
    • H01L27/11898Input and output buffer/driver structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP57067139A 1982-04-23 1982-04-23 ゲ−ト・アレイ大規模集積回路装置 Granted JPS58190036A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP57067139A JPS58190036A (ja) 1982-04-23 1982-04-23 ゲ−ト・アレイ大規模集積回路装置
DE8383302324T DE3378147D1 (en) 1982-04-23 1983-04-22 Gate array large scale integrated circuit devices
EP83302324A EP0093003B1 (en) 1982-04-23 1983-04-22 Gate array large scale integrated circuit devices
IE941/83A IE54711B1 (en) 1982-04-23 1983-04-25 Gate array large scale integrated circuit devices
US07/088,983 US4809029A (en) 1982-04-23 1987-08-21 Gate array large scale integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57067139A JPS58190036A (ja) 1982-04-23 1982-04-23 ゲ−ト・アレイ大規模集積回路装置

Publications (2)

Publication Number Publication Date
JPS58190036A JPS58190036A (ja) 1983-11-05
JPH0247862B2 true JPH0247862B2 (US20030199744A1-20031023-C00003.png) 1990-10-23

Family

ID=13336264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57067139A Granted JPS58190036A (ja) 1982-04-23 1982-04-23 ゲ−ト・アレイ大規模集積回路装置

Country Status (5)

Country Link
US (1) US4809029A (US20030199744A1-20031023-C00003.png)
EP (1) EP0093003B1 (US20030199744A1-20031023-C00003.png)
JP (1) JPS58190036A (US20030199744A1-20031023-C00003.png)
DE (1) DE3378147D1 (US20030199744A1-20031023-C00003.png)
IE (1) IE54711B1 (US20030199744A1-20031023-C00003.png)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5944843A (ja) * 1982-09-07 1984-03-13 Mitsubishi Electric Corp 半導体集積回路装置
JPS6027145A (ja) * 1983-07-25 1985-02-12 Hitachi Ltd 半導体集積回路装置
JPH0624227B2 (ja) * 1983-07-28 1994-03-30 日本電気アイシ−マイコンシステム株式会社 半導体集積回路装置
JP2564787B2 (ja) * 1983-12-23 1996-12-18 富士通株式会社 ゲートアレー大規模集積回路装置及びその製造方法
JPS61218143A (ja) * 1985-03-25 1986-09-27 Hitachi Ltd 半導体集積回路装置
JPH079978B2 (ja) * 1987-02-24 1995-02-01 富士通株式会社 マスタスライス型半導体集積回路
JPH0821625B2 (ja) * 1987-10-02 1996-03-04 三菱電機株式会社 半導体集積回路装置
JP2508204B2 (ja) * 1988-07-26 1996-06-19 日本電気株式会社 ゲ―トアレイ集積回路
JPH02148754A (ja) * 1988-11-29 1990-06-07 Nec Corp ゲートアレー型半導体装置
JPH02152254A (ja) * 1988-12-02 1990-06-12 Mitsubishi Electric Corp 半導体集積回路装置
JPH02177457A (ja) * 1988-12-28 1990-07-10 Hitachi Ltd 半導体装置
JPH03259561A (ja) * 1990-03-09 1991-11-19 Fujitsu Ltd 半導体装置
DE4108730C2 (de) * 1991-03-18 1996-02-29 Telefunken Microelectron Halbleiteranordnung mit Transistorreihen bildenden MOS-Transistoren
JP2951775B2 (ja) * 1991-11-05 1999-09-20 三菱電機株式会社 集積回路装置
JP2917626B2 (ja) * 1991-11-20 1999-07-12 日本電気株式会社 半導体集積回路装置
JPH05308136A (ja) * 1992-04-01 1993-11-19 Nec Corp マスタスライス集積回路
US5347181A (en) * 1992-04-29 1994-09-13 Motorola, Inc. Interface control logic for embedding a microprocessor in a gate array
JP3237304B2 (ja) * 1993-05-31 2001-12-10 富士通株式会社 半導体集積回路
GB9323144D0 (en) * 1993-11-10 1994-01-05 Texas Indstruments Limited Multi-slot i/os
JP3420694B2 (ja) * 1996-12-27 2003-06-30 株式会社東芝 スタンダードセル方式の集積回路
JP3914649B2 (ja) * 1999-02-10 2007-05-16 株式会社東芝 半導体装置
JP2004221231A (ja) * 2003-01-14 2004-08-05 Nec Electronics Corp レイアウトパターン生成のための装置と方法、及びそれを用いた半導体装置の製造方法
JP2014033109A (ja) * 2012-08-03 2014-02-20 Renesas Electronics Corp 半導体チップ

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5493376A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Semiconductor integrated circuit device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4086626A (en) * 1974-10-07 1978-04-25 Fairchild Camera And Instrument Corporation Microprocessor system
US4040035A (en) * 1974-10-30 1977-08-02 Motorola, Inc. Microprocessor having index register coupled to serial-coupled address bus sections and to data bus
US3968478A (en) * 1974-10-30 1976-07-06 Motorola, Inc. Chip topography for MOS interface circuit
US4106090A (en) * 1977-01-17 1978-08-08 Fairchild Camera And Instrument Corporation Monolithic microcomputer central processor
JPS5631730U (US20030199744A1-20031023-C00003.png) * 1979-07-19 1981-03-27
US4484292A (en) * 1981-06-12 1984-11-20 International Business Machines Corporation High speed machine for the physical design of very large scale integrated circuits

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5493376A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Semiconductor integrated circuit device

Also Published As

Publication number Publication date
EP0093003A3 (en) 1986-01-08
EP0093003B1 (en) 1988-09-28
DE3378147D1 (en) 1988-11-03
US4809029A (en) 1989-02-28
JPS58190036A (ja) 1983-11-05
IE54711B1 (en) 1990-01-17
EP0093003A2 (en) 1983-11-02
IE830941L (en) 1983-10-23

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