JP7622308B2 - 半導体デバイスにおける成形された相互接続バンプ - Google Patents

半導体デバイスにおける成形された相互接続バンプ Download PDF

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JP7622308B2
JP7622308B2 JP2020519726A JP2020519726A JP7622308B2 JP 7622308 B2 JP7622308 B2 JP 7622308B2 JP 2020519726 A JP2020519726 A JP 2020519726A JP 2020519726 A JP2020519726 A JP 2020519726A JP 7622308 B2 JP7622308 B2 JP 7622308B2
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bumps
surface area
semiconductor package
power
tapered
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JP2020537342A (ja
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ケイ コドゥリ スリーニーバサン
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テキサス インスツルメンツ インコーポレイテッド
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  • Engineering & Computer Science (AREA)
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  • General Physics & Mathematics (AREA)
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