CN111295748A - 半导体装置中的引线框 - Google Patents
半导体装置中的引线框 Download PDFInfo
- Publication number
- CN111295748A CN111295748A CN201880070342.7A CN201880070342A CN111295748A CN 111295748 A CN111295748 A CN 111295748A CN 201880070342 A CN201880070342 A CN 201880070342A CN 111295748 A CN111295748 A CN 111295748A
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- openings
- leadframe
- bumps
- metal strip
- semiconductor package
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Abstract
在一个示例中,一种形成具有引线框(102)的半导体封装的方法包含诸如利用激光器根据切割图案(146)将金属条带(138)的第一侧(128)切割至第一深度以形成第一多个开口(118),所述第一多个开口可以是曲线的。所述方法进一步包含根据光致抗蚀剂图案将所述金属条带(138)的第二侧(130)蚀刻至第二深度以形成第二多个开口(120)。所述第一多个开口(118)中的至少一些与所述第二多个开口(120)中的至少一些流体连通以形成多根引线框引线(116)。所述第一深度比所述金属条带(138)的高度浅,并且所述第二深度也比所述高度浅。
Description
技术领域
本发明总体上涉及半导体装置,并且更具体地涉及半导体装置中的引线框。
背景技术
在一些类型的半导体封装中,半导体管芯经由多个互连凸块或接线柱直接安装到引线框。多个互连凸块将半导体管芯电连接到引线框。每个互连凸块在半导体管芯上的接触表面积通常与互连凸块在引线框上的接触表面积相同。
发明内容
在一个示例中,一种用于形成半导体封装的方法包含形成用于所述半导体封装的引线框,其中形成所述引线框包含根据切割图案将金属条带的第一侧切割至深度D1以形成在所述第一侧上延伸的第一多个开口。所述深度D1比所述金属条带的高度H浅。所述深度D1从所述金属条带的所述第一侧朝向与所述第一侧相对的第二侧。形成所述引线框的方法进一步包含根据光致抗蚀剂图案将所述金属条带的所述第二侧蚀刻至深度D2以形成在所述第二侧上延伸的第二多个开口,并且其中所述深度D2比所述金属条带的所述高度H浅。所述第一多个开口中的至少一些在所述第二多个开口上方并且与所述第二多个开口中的至少一些流体连通以在所述引线框上形成多根引线。用于切割所述第一侧的所述切割图案包含非线性部分。
用于形成半导体封装的所述方法进一步包含将多个凸块耦合在半导体管芯与所述引线框的所述多根引线上的多个凸块安放位区之间。当从沿着所述多根引线中的至少一根的一端观察时,所述多个凸块中的至少一些看起来重叠。用于形成半导体封装的所述方法还包含用模塑料覆盖所述半导体管芯的至少一部分和所述引线框的至少一部分以形成所述半导体封装。
根据另一示例,一种用于形成半导体封装的方法包含形成用于所述半导体封装的引线框。形成所述引线框的步骤包含根据切割图案切割金属条带的第一侧以形成延伸到所述第一侧中的第一多个开口。所述金属条带具有所述第一侧和第二侧。所述第二侧与所述第一侧相对,并且所述金属条带在所述第一侧与所述第二侧之间具有高度H。形成所述引线框进一步包含在所述金属条带的所述第二侧上施加光致抗蚀剂,根据光致抗蚀剂图案将化学蚀刻施加到所述金属条带的所述第二侧以形成延伸到所述金属条带的所述第二侧中的第二多个开口,并且其中所述第二多个开口的所述至少一部分与所述第一多个开口对准。深度D2通过从所述第二侧开始蚀刻而形成并且小于所述金属条带的所述高度H。
形成所述引线框还包含从所述金属条带的所述第二侧去除所述光致抗蚀剂。切割所述金属条带的所述第一侧涉及形成具有多个凸块安放位区的多根引线,所述凸块安放位区是用于容纳对应凸块的基部的位区。所述方法还包含将多个凸块耦合在半导体管芯与所述引线框上的所述多个凸块安放位区之间。当从沿着所述多根引线中的至少一些的一端观察时,所述多个凸块中的至少一些看起来重叠。所述方法还涉及用模塑料覆盖所述半导体管芯的至少一部分和所述引线框以形成所述半导体封装。
根据另一示例,一种半导体封装包含金属引线框,所述金属引线框包含:金属条带,具有第一侧和第二侧,其中所述第二侧与所述第一侧相对;和第一多个开口,所述第一多个开口从所述第一侧部分地延伸到所述金属条带中并且沿着所述第一侧延伸,所述第一多个开口中的每个具有50微米或更小的横向宽度W1。所述金属引线框进一步包含第二多个开口,所述第二多个开口从所述第二侧部分地延伸到所述金属条带中并且沿着所述第二侧延伸,所述第二多个开口中的每个具有大于所述横向宽度W1的横向宽度W2。所述第一多个开口与所述第二多个开口相交以形成多根引线。所述第一多个开口是非线性的并且在所述第二多个开口上方。所述金属引线框还包含多个凸块安放位区,所述多个凸块安放位区在所述多根引线上位于所述引线框的所述第一侧上。
所述半导体封装进一步包含多个功率凸块,所述多个功率凸块具有宽度W3并且从所述引线框上的所述多个凸块安放位区中的至少一些延伸到半导体管芯上的位区;多个信号凸块,所述多个信号凸块具有宽度W4并且从所述引线框上的所述多个凸块安放位区中的至少一些延伸到所述半导体管芯上的位区,并且其中W3大于W4;其中当从沿着所述多根引线中的至少一根的一端观察时,所述多个功率凸块中的至少一些和所述多个信号凸块中的至少一些看起来重叠;以及模塑料,所述模塑料覆盖所述引线框的至少一部分和所述半导体管芯的至少一部分。
根据再一示例,一种半导体封装包含引线框,所述引线框包含第一侧和与所述第一侧相对的第二侧;和从所述第一侧开始的第一多个开口和从所述第二侧开始的第二多个开口。所述第二多个开口中的每个比所述第一多个开口中的每个宽,并且从所述引线框的俯视图来看,所述第一多个开口中的每个是非线性的。所述半导体封装还包含半导体管芯,所述半导体管芯经由多个第一凸块和多个第二凸块电连接到所述引线框。在所述半导体封装的给定平面上,所述多个第一凸块中的每个包含的面积大于所述第二多个凸块中的每个的面积。从所述半导体封装的侧视图来看,所述第一多个凸块中的至少一个与所述第二多个凸块中的至少一个重叠。本文公开了其它示例和布置。
附图说明
图1是说明性半导体封装的示意性局部切割透视图。
图2A是图1的半导体封装的一部分的示意性正视图。
图2B是图2A的半导体封装的示意性俯视图。
图3A至3E是示出用于形成说明性引线框的工艺步骤的示意图,所述引线框以横截面正视图示出。
图4A是说明性半导体封装的一部分的示意性透视图。
图4B是图4A的半导体封装的示意性正视图。
图4C是图4A的半导体封装的示意性俯视图。
图4D是图4A的半导体封装的示意性俯视图,其中所述半导体封装的开口经由隐藏线示出。
图5是说明性半导体封装的一部分的示意性俯视图。
图6是说明性半导体封装的一部分的示意性俯视图。
图7是说明性半导体封装的一部分的示意性俯视图。
图8是说明性半导体封装的一部分的示意性俯视图。
图9是说明性半导体封装的一部分的示意性俯视图。
图10是形成半导体封装的说明性方法。
具体实施方式
一些半导体封装被配置为使得半导体管芯经由多个互连凸块、导柱或接线柱直接安装到引线框。与使用引线结合的其它类型的引线封装相比,这种类型的封装可以提供改进的电气和热性能。此外,通过消除将半导体管芯连接到引线框的引线结合,可以减少封装寄生效应。
然而,与引线框相比,半导体管芯通常具有较小的用于连接到互连凸块的可用表面积。并且随着电子器件的扩散和功能性的提高,期望进一步减小半导体管芯的大小。因此,随着半导体管芯的缩小,可用于互连凸块连接的表面积也缩小。半导体管芯上可用于互连凸块连接的表面积是确定互连凸块的直径大小和可以用于将半导体管芯连接到引线框的互连凸块的数量的因素之一。
互连凸块具有均匀的圆柱形状,例如,互连凸块的直径在互连凸块的管芯侧与引线框侧之间是均匀的。因此,互连凸块在其管芯连接侧的接触表面积与其在其引线框连接侧的接触表面积相同。减小互连凸块的直径不仅减小互连凸块在半导体管芯上的接触表面积,而且减小在引线框上的接触表面积。
互连凸块在引线框上的接触表面积的减小趋向于导致功率和电流密度在互连凸块与引线框之间的接合处增加。由于互连凸块与引线框之间的接合处发生电迁移,因此增加功率和电流密度可能会导致更高的温度和过早的故障。由于用于将互连凸块附接到引线框的焊料材料的性质,因此用于将互连凸块附接到引线框的焊料材料可能导致电迁移问题。
然而,减小互连凸块在引线框上的接触表面积并不是唯一可能出现的问题。随着半导体管芯与引线框之间功率和电流传输的增加,可能需要更坚固——或更厚的——引线框来应对功率和电流传输的增加。换句话说,引线框在管芯连接侧与PCB连接侧之间可能需要更厚。由于制造限制,因此较厚的引线框趋向于导致相邻引线框引线之间的空间(横向宽度)较大。引线框引线之间的较大空间或开口减小了引线框上用于互连凸块接触的可用表面积,这也有助于增加互连凸块与引线框之间的接合处的功率和电流密度。减小引线框引线或显影图案化引线之间的间距可能会增加引线框上用于凸块连接的可用表面积。
首先参考图1,呈现了根据一些方面的半导体封装100的示意性局部切割透视图。半导体封装100包含引线框102、半导体管芯104以及将半导体管芯104上的位区电连接到引线框102的多个凸块106。多个凸块106包含连接到半导体管芯104上的位区的第一端108和连接到引线框102的相对的第二端110。第一端108耦合到多个全覆铜(COA)元件109。引线框102包含用于容纳多个凸块106的第二端110的多根引线框引线116。
多根引线框引线116或引线条带在物理上彼此分离,并且使用第一多个开口118和第二多个开口120分离。设置第一多个开口118的大小以增加引线框引线116上用于容纳多个凸块106的可用面积。引线框引线116上的可用面积被称为安放区域或条带或安放位区136;这是引线框引线上用于容纳凸块的端部的区域。在下面更详细地描述引线框104的各方面。
半导体封装100包含位于多个凸块106的第二端11与引线框102之间的焊料材料112。焊料材料112用于将多个凸块106的第二端110附接到引线框102。在一些方面,焊料材料112由锡银(SnAg)合金形成。有时使用其它类型的焊料,诸如SnPb、Sn、SnAgCu或其它Sn或Bi合金等等。
焊料凸块界面126形成在多个凸块106的第二端110与焊料材料116之间,所述多个凸块可以是功率或信号凸块或其它连接性凸块。焊料凸块界面126可能遭受电迁移问题,包含空隙传播。增加电流密度可能会导致焊料凸块界面126击穿,这可能产生可靠性问题并且防止一些类型的有源电路放置在与多个凸块106相邻的半导体管芯104中。在一些方面,通过增加引线框102上用于容纳安放位区136上的多个凸块106的可用表面积,可以减小流过焊料凸块界面126的电流密度,由此延长焊料凸块界面126和半导体管芯104的寿命。
仍然主要参考图1,在一些方面,半导体封装100进一步包含模塑料114以保护半导体封装100中的部件。模塑料114为半导体封装100提供结构支撑,并且覆盖引线框102、半导体管芯104、多个凸块106或其任意组合的至少一部分。在一些方面,模塑料114进一步填充半导体封装100的部件之间的间隙,诸如例如多个凸块106之间或引线框引线116之间的间隙。在一些方面,模塑料114是环氧树脂、聚合物或其它绝缘材料。通常在已经将半导体管芯104和引线框102组装在一起之后添加模塑料114。
主要参考图2A至2B并继续参考图1,呈现了半导体封装100的一部分。图2A表示引线框102上的多个凸块106的示意性正视图,而图2B表示所述多个凸块的示意性俯视图。引线框102包含第一侧128和相对的第二侧130,其中多个凸块106连接到第一侧128。引线框102具有在第一侧128与第二侧130之间延伸的高度H。在一些方面,H3取决于预期的封装外形。在一个示例中,具有执行一个功能的单个硅管芯的分立半导体封装趋向于具有约为0.38至0.64mm的引线框厚度,而具有多功能集成电路的封装可能在0.127mm至0.26mm的范围内,但是本领域技术人员应当明白,各种厚度可以用于不同的应用并且这些仅仅是一些示例。
引线框102包含从第一侧128部分地延伸到引线框102中的第一多个开口118,并且包含从第二侧130部分地延伸到引线框102中的第二多个开口120。针对所示定向(例如,平行于z轴121),第一多个开口118和第二多个开口120都沿垂直方向延伸到引线框102中。在一些方面,第一多个开口118和第二多个开口120沿着垂直轴(例如,z轴121)对准。第二多个开口120比第一多个开口118宽。
在一些方面,第一多个开口118和第二多个开口120对准以与引线框102的各部分相交并且将所述引线框的所述各部分完全分离或隔离成例如多根引线框引线116。引线框102的分离沿着z轴121、y轴123、x轴125或其组合发生;在引线框102的各部分之间形成空间。
然而,可能存在不期望引线框102完全分离使得第一多个开口118中的一些或第二多个开口120中的一些未完全对准的情况。同样地,在一些情况下,可能在与第一多个开口118中的一个未完全对准的位置中需要第二多个开口120中的一个,反之亦然。在一些方面,第一多个开口118和第二多个开口120线性地布置。在其它方面,第一多个开口118是非线性的,或者具有曲率或非线性图案,例如,参见图4。根据切割图案146形成第一多个开口118(例如,参见图3E和图4)。开口118、120允许有不同图案,如将在下面进一步解释的。
第一多个开口118具有横向宽度W1(切口的宽度),并且使用激光器、射流或如下面进一步描述的其它技术形成。在一些方面,第一多个开口118的宽度W1小于大约75微米。在一些方面,第一多个开口118的宽度W1为大约50微米,而在另一示例中为25微米。相反,应当明白,在大多数情况下,使用蚀刻的其它技术仅产生不小于125微米的宽度。如上所述,第一多个开口118从第一侧128部分地延伸到引线框102中。因此,第一多个开口118的宽度W1影响第一侧128引线框102上可用于与多个凸块106连接的表面积。通过使宽度W1更小,实现了具有用于凸块106的更大表面积的技术优势。在一些方面,第一多个开口118中的每个的宽度W1的大小不同。在一个示例中,第一多个开口118中的一个具有大约25微米的宽度,而第一多个开口118中的另一个具有大约35微米的宽度。
第二多个开口120具有大于W1的横向宽度W2。在一些方面,第二多个开口120的宽度W2大于大约125微米。在一些方面,第二多个开口120的宽度W2为200微米或更大。第二多个开口120中的每个的宽度W2有时大小不同。在一些方面,第二多个开口120中的每个的宽度W2有时取决于印刷电路板(PCB)规格。在一个示例中,第二多个开口120中的一个具有大约125微米的宽度,而第二多个开口120中的另一个具有大约200微米的宽度。在该示例中,第二多个开口120的宽度W2大于第一多个开口118的宽度W1。在一个方面,第一多个开口118的平均横向宽度W1大于第二多个开口120的平均横向宽度W2。
第一多个开口118具有从第一侧128测量的高度H1(图2A)或深度D1,而第二多个开口120具有从第二侧130测量的高度H2或深度D2。第一多个开口118的高度H1和第二多个开口120的高度H2将等于引线框102的高度H。在一些方面,第二多个开口120的高度H2为引线框102的高度H的大约50%至80%。在一个示例中,引线框102的高度H为大约200微米,第一多个开口118的高度H1为大约50微米,而第二多个开口120的高度H2为大约150微米。在一些方面,第一多个开口118的高度H1为大约75微米或更小。
主要参考图1至2B并且特别参考图2A,引线框102包含多根引线框引线116,其中引线框引线116具有全主体部分132和从全主体部分132横向延伸的悬臂部分134。相对于z方向121,全主体部分132在引线框102的第一侧128与第二侧130之间延伸。悬臂部分134从引线框102的第一侧128上的全主体部分132横向延伸,这在引线框102的第一侧128上产生了用于容纳多个凸块106的较大表面积。
悬臂部分134具有与第一多个开口118的高度H1基本上相同的厚度或深度。然而,应当明白,由于制造技术,因此悬臂部分134的最接近全主体部分132的部分有时具有比第一多个开口118的高度H1稍大的高度或厚度。悬臂部分134的厚度应当足够大到支撑多个凸块106,并且在多个凸块106与多根引线116之间的功率传输期间防止相邻的悬臂部分熔合。
多根引线框引线116在第一多个开口118的构件之间的引线框102的第一侧128上包含安放区域、位区或条带136。安放区域136在引线框引线116的悬臂部分134上方延伸,由此增加了表面积。条带136上的安放区域为相应凸块106的第二端110(伴随有焊料112)提供了附接位置;即,安放区域为对应凸块的基部提供了位置。
仍然主要参考图1至2B,多个互连凸块106沿z方向121平行于纵轴124在半导体管芯104与引线框102之间延伸。多个互连凸块106也被称为导柱或凸块。在一些方面,多个互连凸块106中的每个具有沿着纵轴124的非线性形状。多个互连凸块106的第一端108具有小于第二端110的宽度或直径的宽度或直径。同样地,多个互连凸块106的第一端108具有小于多个互连凸块106的第二端110的横向表面积的横向表面积(垂直于纵轴)。
在一些方面,多个互连凸块106中的每个从第二端110(引线侧)到第一端108(管芯侧)渐缩,使得多个互连凸块106中的每个的宽度从第二端110朝向第一端108减小。在一些方面,多个互连凸块106中的每个的第二端110的表面积(横向端)比第一端108的表面积(横向端)的大小大1至3倍或者更多。在一些方面,第二端110的表面积大约是第一端108的表面积的大小的2倍。第二端110的表面积与第一端108的表面积之间的比率有时基于半导体管芯104上的可用表面积和部件以及引线框102上用于互连凸块连接的可用表面积(例如,凸块安放位区面积136)进行修改。
在一些方面,多个互连凸块106中的每个具有沿着或平行于纵轴124的截锥或截头锥体形状,并且具有横向于纵轴124的圆形横截面形状或其它曲线形状,但是也可以使用其它几何形状,诸如正方形(参见图9)、三角形、多边形、椭圆形(参见图4C)等等。在一些方面,多个互连凸块106沿着纵轴124具有非线性形状,并且具有横向于纵轴124的椭圆形横截面形状。多个互连凸块106可以沿着纵轴124呈现许多非线性形状,但是通常使得第二端110的表面积不同于第一端108的表面积。
在一些方面,使多个凸块106成形以允许多个凸块106的第二端110大于多个凸块106的第一端108(相对于横向端表面积)允许第一端108小到足以配合在半导体管芯104上的安放位区上,同时允许第二端110利用在多根引线框引线116上可用的较大表面积。在一些情况下,通过减小引线框引线116之间的间隔(例如,第一多个开口118的宽度W1)来进一步增加安放区域136,以允许多个凸块106的更大的第二端110连接到引线框引线116。这是技术优势。此外,在一些情况下,增大多根引线116上的可用表面积不仅允许多个凸块106的第二端110更大,而且连接到引线框102的多个凸块106的数量增加。所有这些方面单独地或一起可以帮助减小在多个凸块106的第二端110与引线框102之间流动的电流和功率密度,并切降低热效率低下。同样地,增加多个凸块106的第二端110的大小可以提高电流交换的效率,这可以导致焊料凸块界面126上的热输出减少。
图3A至3E是示出根据一些方面的用于形成引线框(例如,图1的引线框102)的工艺步骤的示意图。参考图3A,引线框102由金属片、金属条带或膜138形成,所述引线框具有第一侧128、相对的第二侧130以及其间的深度或高度H。在一些方面,引线框102在这些形成步骤期间维持其高度H;因此,第一侧128、第二侧130以及其间的高度H也适用于金属条带138,并且将用于表示金属条带138的对应侧和高度。在一些方面,金属条带138由铜或铜合金形成。可以采用其它合适的金属或材料。在金属条带138的第二侧130上沉积光致抗蚀剂140。
参考图3B至3C,根据光致抗蚀剂图案142将掩模(未明确示出)放置在光致抗蚀剂140上。使光致抗蚀剂140暴露于光线以根据光致抗蚀剂图案142在光致抗蚀剂140中形成多个开口144。根据光致抗蚀剂图案142,将化学蚀刻施加到金属条带138的第二侧130至深度D2(图3C)。化学蚀刻形成第二多个开口120或通道,所述第二多个开口或通道具有从第二侧130开始的深度或高度H2。
深度D2比引线框102的高度H浅。在一些方面,将蚀刻施加到金属条带138的第二侧130,直至去除引线框102(或金属条带138)的高度H的50%到90%。在一些方面,将蚀刻施加到金属条带138的第二侧130,直至去除引线框102(或金属条带138)的高度H的80%。蚀刻步骤应当留下足够的金属条带138,使得第一多个开口118的高度H1(图2A)足够厚到支撑多个凸块106(图1所示)并且防止相邻引线框引线116之间的熔合。
第二多个开口120中的每个具有横向宽度W2(图3C)。在一些示例中,第二多个开口120中的一些的宽度具有与多个开口120中的其它开口不同的开口。例如,在一种情况下,第二多个开口120中的一个的宽度W2为200微米或更大,而第二多个开口120中的另一个的宽度W2为大约150微米。第二多个开口120中的每个的宽度W2可以基于印刷电路板(PCB)规格。
主要参考图3D,去除光致抗蚀剂140。在一些方面,可以随后在形成过程中去除光致抗蚀剂140。
主要参考图3E,根据切割图案146将金属条带138的第一侧128精确切割至深度D1。切割形成第一多个开口118,所述多个第一开口具有深度D1或高度H1。深度D1比引线框102的高度H浅。深度D1足以将第一多个开口118与第二多个开口120连接;这提供了公共空间并且提供了隔离以形成引线。即,第一多个开口118沿垂直方向(针对所示定向)与第二多个开口120接合以将引线框102分离成多根引线框引线116。第一多个开口118中的至少一些流体地连接到第二多个开口120中的至少一些。
在一些方面,切割金属条带138,使得第一多个开口118具有小于75微米而在其它方面小于50微米的横向宽度W1。在一些方面,切割金属条带138,使得第一多个开口118具有大约25微米或更小的横向宽度W1。在一些方面,使用激光器、精密水射流、等离子切割器、放电加工或机械切割来切割金属条带138以在其中形成第一多个开口118。在一些方面,使用化学方法来形成第一开口118。可以使用能够产生小于50微米宽的开口的其它合适的装置。尽管这些装置能够产生更宽的开口,但是在一些方面,这些切割装置能够根据切割图案146产生精确的、非线性的或弯曲的开口。因此,在一种情况下,切割图案146和第一多个开口118是至少沿水平方向之一(例如,x轴或y轴)的定制图案或形状(如图1至2B所示)。这提供了优势,因为图案允许引线框上有更大的凸块。
第一多个开口118之间的横向宽度W1和第一多个开口118的高度H1足以防止在操作期间相邻的悬臂部分134之间的熔合。相应地控制第二切割(例如,化学蚀刻)施加到金属条带138的第二侧130的深度D2。
在一个方面,在蚀刻金属条带138以形成第二多个开口120的步骤之后执行切割金属条带138以形成第一多个开口118的步骤。在一些方面,切割图案146和光致抗蚀剂图案142对准或协调。在一些方面,在切割步骤之后去除光致抗蚀剂图案142。在一些方面,金属条带138的第一侧128的切割与其中已经从金属条带138的第二侧130蚀刻高度H3的至少50%的位置对准。
在一些方面,光致抗蚀剂图案142是基本上(例如,大多数)线性的,使得第二多个开口120是基本上线性的。在一些方面,切割图案146也基本上是线性的,使得第一多个开口118是基本上线性的。在其它方面,切割图案146是非线性的,即,是曲线的,使得第一多个开口118基本上是非线性的或弯曲的。在一些情况下,非线性切割图案包含以一定角度连接的笔直的引线部分(例如,参见图5)。
主要参考图4A至4D,呈现了半导体封装200的一部分,所述部分包含引线框202,所述引线框具有从其延伸的多个互连凸块206。图4A表示半导体封装200的示意性透视图。图4B表示半导体封装200的示意性正视图。图4C表示具有未示出的管芯的半导体封装200的示意性俯视图。图4D表示没有管芯的半导体封装200的另一示意性俯视图,并且其中半导体封装200的各方面经由隐藏线示出。
引线框202具有第一侧228和相对的第二侧230。多个互连凸块206从引线框202的第一侧228朝向管芯延伸(参见图1)。第一多个开口218从第一侧228延伸到引线框202中,而第二多个开口220从第二侧230延伸到引线框202中以形成多根引线216。第一多个开口218和第二多个开口220被连接成使得引线框202沿着垂直轴(例如,z轴237)(针对所示定向)分离。在一些方面,第一多个开口218和第二多个开口220被连接成使得引线框202沿着垂直轴和水平轴(例如,z轴237和y轴239)(针对所示定向)分离以形成多根引线。在一些方面,第一多个开口218和第二多个开口220可以被称为流体连通。
引线框202与图1至2B的引线框102的不同之处在于,第一多个开口218是非线性的并且具有弯曲的、正弦的、定制的或其它非线性图案。相反,图1至2B中所示的第一多个开口118中的每个沿着水平轴(例如,y轴)(针对所示定向)是笔直的或线性的。在一些情况下,第一多个开口218仍与第二多个开口220对准(在其顶部上方),使得引线框202至少沿着z轴237被完全分段或分离以产生隔离。引线框202被分离成多根引线框引线216。使用以上参考图3A至3E描述的技术形成第一多个开口218和第二多个开口220。与蚀刻技术相比,上述精密切割设备不仅形成较小且更精确的切口,而且切割设备形成具有定制的、非线性几何形状的第一多个开口218。当从一端观察时,这允许凸块206看起来重叠(例如,参见图4B);当从沿着一或多根引线的一端观察时(端视图),这被称为叉指型、交错或明显的凸块重叠。
如图4B清楚地所示,多个互连凸块206与图1至2B的多个互连凸块106的不同之处在于,多个互连凸块206中的一些沿着一或多个水平方向(例如,x轴241、y轴239或其组合)与多个互连凸块206中的其它互连凸块重叠(从某些视图来看重叠)。设置多个互连凸块206的大小或形状以利用引线框202的第一侧228上的增加的、有时是唯一的表面积或凸块安放位区236。在一些方面,多个互连凸块206中的一些大于多个互连凸块206中的其它互连凸块。在一些方面,基于多个凸块206连接到的半导体管芯中的哪些装置以及半导体管芯(图1中的104)上的可用表面积来定制多个互连凸块206中的每个的大小。
主要参考图4D,第二多个开口220经由隐藏线示出。相对于z方向237,第一多个开口218在第二多个开口220的至少一部分的顶部上方。换句话说,第一多个开口218在第二多个开口220的边界内,如由标记开口220的隐藏线所示。作为一个具体示例,第一多个开口218中的第一开口219在第二多个开口220中的第二开口225的第一壁221与第二壁223之间。
主要参考图5,呈现了半导体封装300的一部分的示意性俯视图。除了切割图案346的形状之外,半导体封装300类似于图4A至4D中所示的半导体封装200。半导体封装300包含引线框302,所述引线框经由从第一侧328开始的至少第一多个开口318和从相对的第二侧开始的第二多个开口(类似于开口220)被分段成多根引线框引线316。多个第一开口318从引线框302的第一侧328朝向相对的第二侧延伸。第二多个开口未示出,但是将类似于图4A至4D中的第二多个开口220布置。
多个第一开口318根据切割图案346布置。切割图案346以及因此第一多个开口318总体上是非线性的,例如,在各位置处沿x方向和y方向都具有迹线。在一些方面,第一多个开口318和切割图案346包含连接在一起以在每一段处形成角度(例如角度θ)的多个直线段348。在一些方面,第一多个开口318和切割图案346是总体上沿y轴方向延伸的修改的Z字形图案。尽管图5的切割图案346由多个直线段348形成,但是在一些情况下,切割图案346还包含具有圆形轮廓的光滑或弯曲段。
主要参考图6,呈现了说明性半导体封装400的一部分的示意性俯视图。除了切割图案446的形状之外,半导体封装400类似于图5中所示的半导体封装300。半导体封装400包含引线框402,所述引线框经由从第一侧528开始的至少第一多个开口418和从相对的第二侧开始的下面的第二多个开口(例如,参见开口220)被分段成多根引线框引线416。多个第一开口418从引线框402的第一侧428朝向相对的第二侧延伸。第二多个开口未示出,但是将类似于图4A至4D中的第二多个开口220布置。
多个第一开口418根据切割图案446布置。切割图案446以及因此第一多个开口418沿着至少一个方向(例如,y轴)总体上是非线性的。在一些方面,第一多个开口418和切割图案446包含连接在一起以形成角度(例如角度θ)的多个直线段448。在一些方面,第一多个开口418和切割图案446形成修改的Z字形图案,所述修改的Z字形图案总体上沿着诸如y轴之类的第一方向延伸。
多个第一开口418和切割图案446包含空间或间隙450。空间450将多根引线框引线417中的一个分离成第一部分452和第二部分454。引线包含用于容纳多个凸块的凸块安放位区。空间450延伸穿过(z方向)引线框402,使得在第一部分452与第二部分454之间实现完全分离。空间450主要用于电分离(隔离)引线框的两个部分。通过这样做,可以获得更多的引脚或I/O(输入/输出)功能性。
主要参考图7,呈现了说明性半导体封装500的一部分的示意性俯视图。半导体封装500类似于图5中所示的半导体封装300和图6中所示的半导体封装400。半导体封装500示出了在一些情况下如何将切割图案546、第一多个开口518一件多个互连凸块506定制为多种形状的另一方面。半导体封装500包含引线框502,所述引线框经由至少第一多个开口518和下面的第二多个开口(类似于开口220)被分段成多根引线框引线516。第二多个开口未示出,但是将类似于图4A至4D中的第二多个开口220布置。应当明白,第一多个开口518将连接到第二多个开口,如在上述示例中所述。
多个第一开口518和切割图案546包含空间或间隙550。空间550将多根引线框引线517中的一个分离成第一部分552和第二部分554。空间550延伸穿过(z轴)引线框502,使得在第一部分552与第二部分554之间实现完全分离。基于PCB和半导体管芯配置,有时在大小、形状、位置等方面定制第一多个开口518和多个凸块506。示出了具有变化的宽度和形状的各种凸块506。
主要参考图8,呈现了说明性半导体封装600的一部分的另一示意性俯视图。半导体封装600包含引线框602和从其延伸的多个互连凸块606。半导体封装600示出了在一些方面如何通过使用非线性切割图案646产生非线性的第一多个开口618来增加引线框602的第一侧628上的凸块安放位区面积636,使得增加多个互连凸块606的横向横截表面积A1(外环)。作为参考,横向截面表面积A2叠加在多个凸块606的表面积A1上方,以示出当第一多个开口618是线性的(A2)(诸如图2A至2B所示)与当所述第一多个开口是曲线的(A1)之间的表面积的变化。因此,通过将第一多个开口618修改为非线性的或者具有曲率,多个凸块606的表面积A1从表面积A1增加到表面积A2。在一些示例中,表面积A2是表面积A1的两倍。
主要参考图9,呈现了说明性半导体封装700的一部分的示意性俯视图。半导体封装700类似于图5中所示的半导体封装300和图6中所示的半导体封装400。半导体封装700包含引线框702,所述引线框经由至少第一多个开口718和下面的第二多个开口(类似于开口220)被分段成多根引线框引线716。第二多个开口未示出,但是将类似于图4A至4D中的第二多个开口220布置。应当明白,第一多个开口718将如上文在示例中所述的那样连接到第二多个开口或与所述第二多个开口相交或流体连通,以形成多根引线716。
在一些情况下,基于PCB和半导体管芯配置,在大小、形状、位置等方面定制第一多个开口718和切割图案746以及多个凸块506。
多个功率凸块707和多个信号凸块709耦合到第一侧728,并且在第一侧728(在该端上也具有焊料;参见图1中的112)与管芯上的位区(未明确地示出但类似于图1中的104)之间延伸。尽管凸块707、709的大小可能因分组不同而变化,但是为了解释如何增加凸块的密度,假定多个功率凸块707中的每个具有宽度W3,在这种情况下是直径,因为凸块707在第一端具有圆形横截面。应当理解,如先前所建议可以使用任何形状,就此而言,(针对所示定向)在左侧示出了两个横截面当中的正方形横截面。在其它示例中,取决于凸块的功能性,以各种宽度使用其它大小的凸块。
可以假定多个信号凸块709具有宽度W4,所述宽度在该示例中是直径。因为它们不携带功率,所以信号凸块709的横向宽度小于功率凸块707的横向宽度,即,W3>W4。此外,因为第一开口718是非线性的,例如弯曲的、曲线的、图案化的、正弦的或其它形状的,所以图案允许功率凸块707和信号凸块709交错;这意味着,如果沿着诸如中间引线716之类的引线沿着第一侧728的表面观察,则功率凸块707和信号凸块709将看起来重叠(同样参见图4B中的明显的重叠245)。
在一个示例中,多个功率凸块707中的至少一个在多根引线716中的第一引线717上,所述第一引线与多根引线716中的第二引线719相邻。多个信号凸块709中的至少一个在第二引线719上。第一引线717上的多个功率凸块707中的至少一个的中心721与多个信号凸块709中的至少一个的中心723正交地分离距离D。将凸块正交地分离的距离意指功率凸块707的纵轴727(总体上沿着引线)与信号凸块709的纵轴729之间的距离。功率凸块707的宽度的一半和信号凸块709的宽度的一半之和大于距离D,从而将中心分开,即,((1/2*W3)+(1/2*W4))>D。这是可能的,因为第一开口718被图案化成围绕功率凸块707,然后在725处向内移动(如所示朝向中心移动)以围绕信号凸块709,然后向外围绕下一个功率凸块。
主要参考图10,呈现了包含用于制造在引线框上提供更多安放空间的半导体封装的方法的另一示例。方法包含形成上述类型的引线框,然后完成封装。因此,在步骤800中,形成符合上面的示例的引线框(例如,图1至3的102;图4的202;图5的302;图6的402;图7的502;图8的602)。引线框具有重叠的凸块安放位区;即,当从一端观察时(端视图),在施加时看起来重叠的凸块安放位区或凸块(参见图4B中的245)。在步骤802处,将多个凸块耦合在半导体管芯(图1中的104)与引线框上的凸块安放位区之间。应当理解,这包含焊料112(图1)。方法还包含在步骤804处施加模塑料(例如,图1的114)以覆盖引线框和凸块的至少一部分。
在一个示例中,实现了将半导体管芯互连到引线框同时增加引线框上的连接界面并减小管芯上的互连面积的期望。互连是通过多个凸块完成的,所述多个凸块在连接于引线框上的一侧具有宽的横向基部并且在管芯上的互连点处具有较小的横向端基部。尽管它们可以采用任意数量的不同横截面(横向横截面)-圆形、椭圆形、正方形、三角形、多边形等,但是总体纵向轮廓从较大基部到较窄基部渐缩。为了在引线框侧容纳较大基部,从一端(端视图;图4B中的245)观看,凸块安放位区通过允许它们重叠而变得更大。如果从沿着引线框的顶表面的参考点(眼睛与表面相邻)观看,凸块将看起来交错或重叠(参见图4B中的245)。然而,当从顶部观察时,可能会看到将引线框分离成不同引线的顶部开口形成在引线框的x-y平面上编入和编出的图案,使得每个凸块的基部实际上彼此分离,但是看起来与边缘重叠(端视图)。
对于使引线成形的第一开口,可以形成许多不同的图案,诸如Z字形、正弦、正交或成角度拐弯。为了形成图案,在一个示例中完成了两件事。形成的底部开口或通道或空间约为引线框厚度的其它厚度的50%至80%,然后除此以外,从顶表面开始按照图案进行精确切割。使用诸如激光器或水射流或精密机械切割之类的精密设备来进行精确切割。如本领域技术人员应当理解,可以通过编程的图案来完成精确切割。从顶部开始的这种精确切割允许图案容纳多个凸块的较大基部。在一个示例中,图案可以最初是笔直的(平行于引线)持续一段距离,然后开始变为非线性图案。因为精密切割是在底表面上形成的较宽开口上方的顶表面上进行的,所以形成并隔离了引线。
从前文应当清楚本文中使用的术语的含义,但是另外也提供以下增补。“凸块”(也称为接线柱或导柱)是管芯与引线框之间的一种互连类型。示例凸块在上面呈现为106、206、506、606、707以及709。引线上的“凸块安放位区”或“安放位区”是设置大小以容纳对应凸块的一端或基部以形成连接的引线的表面上的各部分。在至少一些引线上示出示例凸块安放位区136,例如,区域、条带或安放位区136。凸块106、206、506、606、707以及709的所有俯视图都是关于引线框上的凸块安放位区。在一个示例中,凸块安放位区是引线上的旨在容纳凸块以形成互连的位置。“化学蚀刻”是一种使用蚀刻化学物质去除选定的未保护位置中的全部或部分金属的方式。“曲线的”意指至少部分地形成有弯曲的边界或线。曲线的示例是图9中所示的弯曲图案。“切割图案”意指用于使切割装置描绘出切口的图案;切割图案可以保存在存储器中。
本文中的“第一多个开口”是指如下开口:由精密切割装置从金属条带的第一表面形成并且至少部分地在第二多个开口上方以形成穿过金属条带的组合开口。两个部分之间的“流体连通”意指其间的开口允许流体(例如,空气)在其间流动。如果底部的空间(针对所示定向)与顶部的空间相交使得处于流体连通,则这意味着这两个空间形成包含顶部空间和底部空间两者的一个空间。“引线框”是金属框,所述金属框提供与封装管芯或半导体装置的外部电连接。上面的示例包含101、202、302、402、502、602以及702。引线框的“引线”是纵向构件,至少在一些示例中,可以在所述纵向构件上附接凸块。上面的示例包含116、216、316、416、516、517以及716。“金属条带”意指合金(例如铜合金)或形成引线框的金属。上面的示例是金属条带138。
“模塑料”是作为半导体封装一部分的环氧树脂。有时用某种二氧化硅填充物填充树脂,以降低热膨胀系数以使其与引线框连同少量其它添加剂的热膨胀系数更好地匹配。上面的示例是模塑料114。关于引线框的金属条带中的开口的“从俯视图来看是非线性的”或平面图意味着,当从表面上方观察金属条带时(例如,类似于图4C),可知开口基本上是曲线的或者含有总体非线性段;图4C中的俯视图中的所有开口都是示例。
“非线性部分”是指除线性外的部分,例如曲线部分。
“光致抗蚀剂图案”是用于激活光致抗蚀剂层的部分的图案或图像。“半导体管芯”是具有功能电路或功能的半导体管芯。上面的示例是图1的管芯104。“半导体封装”是在与引线框互连并且至少部分地被模塑料覆盖之后的半导体管芯。上面的示例是半导体封装100。“开口”意指已经去除或未形成材料的空隙或位置。
关于表述“在半导体的给定横截平面上,多个第一凸块中的每个包含的横截面积大于第二多个凸块中的每个的横截面积”,从图4B可以清楚地看到示例。半导体封装的给定横截平面207的示例以虚线示出,因为其与多个第一凸块中的第一凸块209和多个第二凸块中的第二凸块211中的一个相交。显然,第一凸块209的横截面积(对于沿着平面207的横向切割)将大于第二凸块211的横截面积(对于沿着平面207的横向切割)。横截面积是指在进行横截面切割(例如,在纵向对象上进行横向切割)时所得到的形状的面积;因此,圆柱的横向横截面积为圆形。在一个示例中,较大的第一凸块209是功率凸块,而较小的第二凸块211是信号凸块。
从边缘或端视图观察时,关于表述“第一多个凸块中的至少一个重叠”意味着当从一端沿着引线观看时(类似于图4B的视图),将看到凸块看起来重叠(图4B中的245)。如果从该角度(沿着引线并且沿着金属条带的表面)照亮凸块以形成投影剪影,则至少两个相邻的凸块209、211在剪影中看起来部分地合并。
关于表述“将金属条带的第一侧切割至深度D1……以形成在第一侧上延伸的第一多个开口,其中深度D1小于金属条带的高度H”意味着,在一个示例中,用于形成第一开口的从金属条带的第一侧开始并向第二侧移动的切割的深度为距离D1,但并非贯穿金属条带,所述金属条带具有H3的厚度或宽度或高度。H3在第一表面与第二表面之间。从第一侧开始切割至深度D1以形成第一开口。第二开口从第二侧开始,并且第二开口涉及第二侧沿第一侧的方向至D2深度之间去除或未形成的材料。如果如预期的那样,D1+D2=H3,则已经形成了穿过金属条带的完整开口或空间。
在权利要求书的范围内,修改在所描述的布置中是可能的,并且其它布置是可能的。
Claims (27)
1.一种用于形成半导体封装的方法,所述方法包括:
形成用于所述半导体封装的引线框,其中形成所述引线框包括:
根据切割图案将金属条带的第一侧切割至深度D1以形成在所述第一侧上延伸的第一多个开口,其中所述深度D1小于所述金属条带的高度H,所述深度D1从所述金属条带的所述第一侧朝向与所述第一侧相对的第二侧,
根据光致抗蚀剂图案将所述金属条带的所述第二侧蚀刻至深度D2以形成在所述第二侧上延伸的第二多个开口,其中所述深度D2比所述金属条带的所述高度H浅,
其中所述第一多个开口中的至少一些在所述第二多个开口上方并且与所述第二多个开口中的至少一些流体连通以在所述引线框上形成多根引线,并且
其中用于切割所述第一侧的所述切割图案包含非线性部分;
将多个凸块耦合在半导体管芯与所述引线框的所述多根引线上的多个凸块安放位区之间,其中当从沿着所述多根引线中的至少一根的一端观察时,所述多个凸块中的至少一些看起来重叠;以及
用模塑料覆盖所述半导体管芯的至少一部分和所述引线框的至少一部分以形成所述半导体封装。
2.根据权利要求1所述的用于形成半导体封装的方法,其中所述金属条带的所述第一侧的所述切割包含使用激光器、精密水射流或等离子切割器。
3.根据权利要求1所述的用于形成半导体封装的方法,其中所述切割图案与所述光致抗蚀剂图案对准,使得所述第一开口在所述第二开口上方,并且其中所述金属条带的所述第一侧的所述切割与其中已经从所述金属条带的所述第二侧蚀刻所述高度H的至少50%的位置对准。
4.根据权利要求1所述的用于形成半导体封装的方法,其中从所述第二侧开始的所述蚀刻去除了所述金属条带的所述高度H的50%至80%。
5.根据权利要求1所述的用于形成半导体封装的方法,其中所述金属条带的所述第一侧的所述切割包含形成横向宽度W1小于50微米的切口。
6.根据权利要求1所述的用于形成半导体封装的方法,其中所述金属条带的所述第一侧的所述切割包含形成横向宽度W1小于25微米的切口。
7.根据权利要求1所述的用于形成半导体封装的方法,其中在所述蚀刻之后执行所述切割。
8.根据权利要求1所述的用于形成半导体封装的方法,其中所述光致抗蚀剂图案是基本上线性的。
9.根据权利要求1所述的用于形成半导体封装的方法,其中所述光致抗蚀剂图案是基本上线性的并且所述切割图案是曲线的。
10.一种方法,包括:
形成用于半导体封装的引线框,其中形成所述引线框包括:
根据切割图案切割金属条带的第一侧以形成延伸到所述第一侧中的第一多个开口,所述金属条带具有所述第一侧和第二侧,其中所述第二侧与所述第一侧相对,并且其中所述金属条带在所述第一侧与所述第二侧之间具有高度为H,
在所述金属条带的所述第二侧上施加光致抗蚀剂,
根据光致抗蚀剂图案将化学蚀刻施加到所述金属条带的所述第二侧以形成延伸到所述金属条带的所述第二侧中的第二多个开口,其中所述第二多个开口的所述至少一部分与所述第一多个开口对准,并且其中从所述第二侧开始的所述蚀刻的深度D2小于所述金属条带的所述高度H,
从所述金属条带的所述第二侧去除所述光致抗蚀剂,
其中切割所述金属条带的所述第一侧包括形成具有多个凸块安放位区的多根引线,所述凸块安放位区是用于容纳对应凸块的基部的位区;
将多个凸块耦合在半导体管芯与所述引线框上的所述多个凸块安放位区之间,并且其中当从沿着所述多根引线中的至少一些的一端观察时,所述多个凸块中的至少一些看起来重叠;以及
用模塑料覆盖所述半导体管芯的至少一部分和所述引线框以形成所述半导体封装。
11.根据权利要求10所述的方法,其中切割所述金属条带的所述第一侧包括使用激光器。
12.根据权利要求10所述的方法,其中切割所述金属条带的所述第一侧包括使用精密水射流或等离子切割器。
13.根据权利要求10所述的方法,其中施加所述化学蚀刻直至根据所述光致抗蚀剂图案去除所述金属条带的所述高度H的50%至80%。
14.根据权利要求10所述的方法,其中切割所述金属条带的所述第一侧包含形成横向宽度W1小于50微米的切口。
15.根据权利要求10所述的方法,其中切割所述金属条带的所述第一侧包含形成横向宽度W1小于25微米的切口。
16.根据权利要求10所述的方法,其中在施加所述化学蚀刻的步骤之后执行所述切割。
17.根据权利要求10所述的方法,其中所述切割图案是非线性的并且类似于正弦图案。
18.一种半导体封装,包括:
金属引线框,所述金属引线框包括:
金属条带,具有第一侧和第二侧,其中所述第二侧与所述第一侧相对,
第一多个开口,从所述第一侧部分地延伸到所述金属条带中并且沿着所述第一侧延伸,所述第一多个开口中的每个具有50微米或更小的横向宽度W1,
第二多个开口,从所述第二侧部分地延伸到所述金属条带中并且沿着所述第二侧延伸,所述第二多个开口中的每个具有大于所述横向宽度W1的横向宽度W2,其中所述第一多个开口与所述第二多个开口相交以形成多根引线,
其中所述第一多个开口是非线性的并且在所述第二多个开口上方,以及
多个凸块安放位区,在所述多根引线上位于所述引线框的所述第一侧上;
多个功率凸块,具有宽度W3并且从所述引线框上的所述多个凸块安放位区中的至少一些延伸到半导体管芯上的位区;
多个信号凸块,具有宽度W4并且从所述引线框上的所述多个凸块安放位区中的至少一些延伸到所述半导体管芯上的位区,并且其中W3大于W4;
其中当从沿着所述多根引线中的至少一根的一端观察时,所述多个功率凸块中的至少一些和所述多个信号凸块中的至少一些看起来重叠;以及
模塑料,覆盖所述引线框的至少一部分和所述半导体管芯的至少一部分。
19.根据权利要求18所述的半导体封装,其中所述多个功率凸块中的至少一个在所述多根引线中的第一引线上,所述第一引线与所述多根引线中的第二引线相邻,其中所述多个信号凸块中的至少一个耦合到所述第二引线,并且其中所述第一引线上的所述多个功率凸块中的所述至少一个的中心与所述多个信号凸块中的所述至少一个的中心正交地分离距离D,并且其中W3的一半加上W4的一半大于D。
20.根据权利要求18所述的半导体封装,其中所述多个功率凸块中的每个沿着纵向轴线从所述半导体管芯上的一端到所述引线框上的较大端渐缩。
21.根据权利要求18所述的半导体封装,其中所述第二多个开口的深度为所述金属引线框的高度H的50%至80%。
22.根据权利要求18所述的半导体封装,其中所述第二多个开口是线性的。
23.一种半导体封装,包括:
引线框,包含第一侧和与所述第一侧相对的第二侧;
从所述第一侧开始的第一多个开口和从所述第二侧开始的第二多个开口,所述第二多个开口中的每个比所述第一多个开口中的每个宽,从所述引线框的俯视图来看,所述第一多个开口中的每个是非线性的;
半导体管芯,经由多个第一凸块和多个第二凸块电连接到所述引线框,在所述半导体封装的给定横截平面上,所述多个第一凸块中的每个包含的横向横截面积大于所述第二多个凸块中的每个的横向横截面积;并且
其中从所述半导体封装的侧视图来看,所述第一多个凸块中的至少一个与所述第二多个凸块中的至少一个重叠。
24.根据权利要求23所述的半导体封装,其中从所述引线框的平面图来看,所述第二多个开口中的每个是线性的。
25.根据权利要求23所述的半导体封装,其中模塑料覆盖所述引线框、所述半导体管芯、所述第一多个开口以及所述第二多个开口的各部分。
26.根据权利要求23所述的半导体封装,其中所述多个第一凸块用于将功率传输到所述半导体管芯。
27.根据权利要求23所述的半导体封装,其中所述多个第二凸块用于将信号传输到所述半导体。
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US16/150,986 US11152322B2 (en) | 2017-10-05 | 2018-10-03 | Leadframes in semiconductor devices |
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CN201880070342.7A Pending CN111295748A (zh) | 2017-10-05 | 2018-10-05 | 半导体装置中的引线框 |
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US11444048B2 (en) | 2022-09-13 |
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US10957666B2 (en) | 2021-03-23 |
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US20190109016A1 (en) | 2019-04-11 |
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