JP7570410B2 - はんだ接合部間の架橋の防止 - Google Patents
はんだ接合部間の架橋の防止 Download PDFInfo
- Publication number
- JP7570410B2 JP7570410B2 JP2022518632A JP2022518632A JP7570410B2 JP 7570410 B2 JP7570410 B2 JP 7570410B2 JP 2022518632 A JP2022518632 A JP 2022518632A JP 2022518632 A JP2022518632 A JP 2022518632A JP 7570410 B2 JP7570410 B2 JP 7570410B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- pad
- pads
- top surface
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/097—Cleaning
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
- H10W70/616—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together package substrates, interposers or redistribution layers combined with bridge chips
- H10W70/618—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together package substrates, interposers or redistribution layers combined with bridge chips the bridge chips being embedded in the package substrates, interposers or redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
- H10W74/141—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being on at least the sidewalls of the semiconductor body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
- H10W72/01271—Cleaning, e.g. oxide removal or de-smearing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07232—Compression bonding, e.g. thermocompression bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
- H10W72/07253—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/221—Structures or relative sizes
- H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/231—Shapes
- H10W72/237—Multiple bump connectors having different shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
- H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/281—Auxiliary members
- H10W72/287—Flow barriers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/585,337 | 2019-09-27 | ||
| US16/585,337 US11004819B2 (en) | 2019-09-27 | 2019-09-27 | Prevention of bridging between solder joints |
| PCT/IB2020/057798 WO2021059047A1 (en) | 2019-09-27 | 2020-08-19 | Prevention of bridging between solder joints |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2022549632A JP2022549632A (ja) | 2022-11-28 |
| JP2022549632A5 JP2022549632A5 (enExample) | 2022-12-13 |
| JP7570410B2 true JP7570410B2 (ja) | 2024-10-21 |
Family
ID=75163699
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022518632A Active JP7570410B2 (ja) | 2019-09-27 | 2020-08-19 | はんだ接合部間の架橋の防止 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US11004819B2 (enExample) |
| JP (1) | JP7570410B2 (enExample) |
| CN (1) | CN114303231B (enExample) |
| DE (1) | DE112020004630T5 (enExample) |
| GB (1) | GB2603403B (enExample) |
| WO (1) | WO2021059047A1 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11004819B2 (en) * | 2019-09-27 | 2021-05-11 | International Business Machines Corporation | Prevention of bridging between solder joints |
| US11574817B2 (en) | 2021-05-05 | 2023-02-07 | International Business Machines Corporation | Fabricating an interconnection using a sacrificial layer |
| US11735529B2 (en) * | 2021-05-21 | 2023-08-22 | International Business Machines Corporation | Side pad anchored by next adjacent via |
| KR102587161B1 (ko) * | 2022-06-15 | 2023-10-11 | 엘지이노텍 주식회사 | 반도체 패키지 |
| US20240324109A1 (en) * | 2023-03-20 | 2024-09-26 | Western Digital Technologies, Inc. | Solder barrier contact for an integrated circuit |
| WO2025252529A1 (en) * | 2024-06-05 | 2025-12-11 | Ams-Osram International Gmbh | Method for producing a display, display substrate and display |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004140050A (ja) | 2002-10-16 | 2004-05-13 | Asahi Kasei Chemicals Corp | 高信頼性プリント配線板 |
| WO2007004657A1 (ja) | 2005-06-30 | 2007-01-11 | Ibiden Co., Ltd. | プリント配線板 |
| JP2009105393A (ja) | 2007-10-05 | 2009-05-14 | Shinko Electric Ind Co Ltd | 配線基板及び半導体装置、並びにこれらの製造方法 |
| JP2011082305A (ja) | 2009-10-06 | 2011-04-21 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
| JP2015018976A (ja) | 2013-07-11 | 2015-01-29 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| JP2016143810A (ja) | 2015-02-04 | 2016-08-08 | 新光電気工業株式会社 | 配線基板及び電子部品装置とそれらの製造方法 |
| US20190051603A1 (en) | 2017-08-10 | 2019-02-14 | International Business Machines Corporation | High-density interconnecting adhesive tape |
Family Cites Families (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02251145A (ja) * | 1989-03-24 | 1990-10-08 | Citizen Watch Co Ltd | 突起電極形成方法 |
| US5241456A (en) | 1990-07-02 | 1993-08-31 | General Electric Company | Compact high density interconnect structure |
| US5785585A (en) * | 1995-09-18 | 1998-07-28 | International Business Machines Corporation | Polish pad conditioner with radial compensation |
| US5910341A (en) * | 1996-10-31 | 1999-06-08 | International Business Machines Corporation | Method of controlling the spread of an adhesive on a circuitized organic substrate |
| US6544584B1 (en) * | 1997-03-07 | 2003-04-08 | International Business Machines Corporation | Process for removal of undesirable conductive material on a circuitized substrate and resultant circuitized substrate |
| JPH10290054A (ja) * | 1997-04-16 | 1998-10-27 | Sony Corp | プリント配線基板 |
| US6099959A (en) * | 1998-07-01 | 2000-08-08 | International Business Machines Corporation | Method of controlling the spread of an adhesive on a circuitized organic substrate |
| US6056831A (en) * | 1998-07-10 | 2000-05-02 | International Business Machines Corporation | Process for chemically and mechanically enhancing solder surface properties |
| US6224392B1 (en) * | 1998-12-04 | 2001-05-01 | International Business Machines Corporation | Compliant high-density land grid array (LGA) connector and method of manufacture |
| US6177729B1 (en) * | 1999-04-03 | 2001-01-23 | International Business Machines Corporation | Rolling ball connector |
| US7015580B2 (en) * | 2003-11-25 | 2006-03-21 | International Business Machines Corporation | Roughened bonding pad and bonding wire surfaces for low pressure wire bonding |
| US7861915B2 (en) | 2004-04-16 | 2011-01-04 | Ms2 Technologies, Llc | Soldering process |
| JP4997105B2 (ja) * | 2005-05-23 | 2012-08-08 | イビデン株式会社 | プリント配線板およびその製造方法 |
| US7999383B2 (en) | 2006-07-21 | 2011-08-16 | Bae Systems Information And Electronic Systems Integration Inc. | High speed, high density, low power die interconnect system |
| JP5143382B2 (ja) * | 2006-07-27 | 2013-02-13 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
| CN101246933A (zh) | 2007-02-12 | 2008-08-20 | 福葆电子股份有限公司 | 用于发光二极管磊芯片的焊垫制程 |
| JP2009099597A (ja) | 2007-10-12 | 2009-05-07 | Nec Electronics Corp | 半導体装置およびその製造方法 |
| CN101552211A (zh) | 2008-04-03 | 2009-10-07 | 旭德科技股份有限公司 | 复合金属基板及其工艺 |
| US20140145328A1 (en) | 2009-07-13 | 2014-05-29 | Georgia Tech Research Corporation | Interconnect assemblies and methods of making and using same |
| JP5428667B2 (ja) | 2009-09-07 | 2014-02-26 | 日立化成株式会社 | 半導体チップ搭載用基板の製造方法 |
| JP5544872B2 (ja) * | 2009-12-25 | 2014-07-09 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
| JP2012029418A (ja) * | 2010-07-22 | 2012-02-09 | Nagano Japan Radio Co | 電力伝送システム |
| US8901431B2 (en) * | 2010-12-16 | 2014-12-02 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing printed wiring board |
| JP5240742B2 (ja) * | 2011-08-25 | 2013-07-17 | 京セラ株式会社 | 携帯通信端末 |
| JP2014007363A (ja) * | 2012-06-27 | 2014-01-16 | Renesas Electronics Corp | 半導体装置の製造方法および半導体装置 |
| JP5891157B2 (ja) * | 2012-09-19 | 2016-03-22 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| KR20140087541A (ko) | 2012-12-31 | 2014-07-09 | 삼성전기주식회사 | 솔더 프린트된 회로 기판 및 회로기판의 솔더 프린팅 방법 |
| US9324557B2 (en) * | 2014-03-14 | 2016-04-26 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Method for fabricating equal height metal pillars of different diameters |
| US10249593B2 (en) | 2014-06-20 | 2019-04-02 | Agency For Science, Technology And Research | Method for bonding a chip to a wafer |
| JP2016066745A (ja) * | 2014-09-25 | 2016-04-28 | イビデン株式会社 | プリント配線基板およびこれを備えた半導体装置 |
| TWI535346B (zh) | 2014-12-10 | 2016-05-21 | 上海兆芯集成電路有限公司 | 線路基板和封裝結構 |
| TWI575686B (zh) | 2015-05-27 | 2017-03-21 | 南茂科技股份有限公司 | 半導體結構 |
| DK3130407T3 (da) * | 2015-08-10 | 2021-02-01 | Apator Miitors Aps | Fremgangsmåde til binding af en piezoelektrisk ultralydstransducer |
| US9559081B1 (en) | 2015-08-21 | 2017-01-31 | Apple Inc. | Independent 3D stacking |
| US10186478B2 (en) * | 2016-12-30 | 2019-01-22 | Texas Instruments Incorporated | Packaged semiconductor device with a particle roughened surface |
| US10522436B2 (en) | 2017-11-15 | 2019-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Planarization of semiconductor packages and structures resulting therefrom |
| US11166381B2 (en) * | 2018-09-25 | 2021-11-02 | International Business Machines Corporation | Solder-pinning metal pads for electronic components |
| US11004819B2 (en) * | 2019-09-27 | 2021-05-11 | International Business Machines Corporation | Prevention of bridging between solder joints |
| US11264314B2 (en) * | 2019-09-27 | 2022-03-01 | International Business Machines Corporation | Interconnection with side connection to substrate |
| KR102876447B1 (ko) * | 2020-09-16 | 2025-10-24 | 삼성전자주식회사 | 반도체 패키지 장치 |
| US12100662B2 (en) | 2020-12-18 | 2024-09-24 | Intel Corporation | Power-forwarding bridge for inter-chip data signal transfer |
| KR20250027433A (ko) * | 2023-08-18 | 2025-02-26 | 삼성전자주식회사 | 반도체 패키지 |
-
2019
- 2019-09-27 US US16/585,337 patent/US11004819B2/en active Active
-
2020
- 2020-08-19 DE DE112020004630.3T patent/DE112020004630T5/de active Pending
- 2020-08-19 JP JP2022518632A patent/JP7570410B2/ja active Active
- 2020-08-19 WO PCT/IB2020/057798 patent/WO2021059047A1/en not_active Ceased
- 2020-08-19 CN CN202080061510.3A patent/CN114303231B/zh active Active
- 2020-08-19 GB GB2205176.7A patent/GB2603403B/en active Active
-
2021
- 2021-03-24 US US17/210,720 patent/US11456269B2/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004140050A (ja) | 2002-10-16 | 2004-05-13 | Asahi Kasei Chemicals Corp | 高信頼性プリント配線板 |
| WO2007004657A1 (ja) | 2005-06-30 | 2007-01-11 | Ibiden Co., Ltd. | プリント配線板 |
| JP2009105393A (ja) | 2007-10-05 | 2009-05-14 | Shinko Electric Ind Co Ltd | 配線基板及び半導体装置、並びにこれらの製造方法 |
| JP2011082305A (ja) | 2009-10-06 | 2011-04-21 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
| JP2015018976A (ja) | 2013-07-11 | 2015-01-29 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| JP2016143810A (ja) | 2015-02-04 | 2016-08-08 | 新光電気工業株式会社 | 配線基板及び電子部品装置とそれらの製造方法 |
| US20190051603A1 (en) | 2017-08-10 | 2019-02-14 | International Business Machines Corporation | High-density interconnecting adhesive tape |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114303231A (zh) | 2022-04-08 |
| CN114303231B (zh) | 2025-11-28 |
| US20210098404A1 (en) | 2021-04-01 |
| JP2022549632A (ja) | 2022-11-28 |
| US11456269B2 (en) | 2022-09-27 |
| GB2603403B (en) | 2023-10-25 |
| GB2603403A (en) | 2022-08-03 |
| GB202205176D0 (en) | 2022-05-25 |
| US11004819B2 (en) | 2021-05-11 |
| DE112020004630T5 (de) | 2022-06-09 |
| WO2021059047A1 (en) | 2021-04-01 |
| US20210210454A1 (en) | 2021-07-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP7570410B2 (ja) | はんだ接合部間の架橋の防止 | |
| JP7617906B2 (ja) | 基板への側面接続を含む相互接続 | |
| US11164817B2 (en) | Multi-chip package structures with discrete redistribution layers | |
| JP7116380B2 (ja) | チップを相互接続する構造を含む基板、電子デバイス、およびその製作する方法 | |
| TWI496259B (zh) | 封裝裝置及其製造方法 | |
| JP3554695B2 (ja) | 半導体集積回路におけるハンダ相互接続を製造する方法および半導体集積回路を製造する方法 | |
| EP2966680B1 (en) | Stacked device and method of producing same | |
| US9324557B2 (en) | Method for fabricating equal height metal pillars of different diameters | |
| US9401308B2 (en) | Packaging devices, methods of manufacture thereof, and packaging methods | |
| US9508594B2 (en) | Fabricating pillar solder bump | |
| US20130161814A1 (en) | Semiconductor chip with offset pads | |
| CN101652847A (zh) | 电学互连结构及其形成方法 | |
| US20050040525A1 (en) | Package module for an IC device and method of forming the same | |
| JP2002270718A (ja) | 配線基板及びその製造方法、半導体装置及びその製造方法、回路基板並びに電子機器 | |
| US20230352389A1 (en) | Semiconductor structure and manufacturing method thereof | |
| TWI814524B (zh) | 電子封裝件及其製法與電子結構及其製法 | |
| CN113594047A (zh) | 具有应力缓冲作用的微凸点芯片封装结构及其制备方法 | |
| CN103378041A (zh) | 迹线上凸块芯片封装的方法和装置 | |
| US11574817B2 (en) | Fabricating an interconnection using a sacrificial layer | |
| KR101827608B1 (ko) | 패키지 구조체에서 가변적인 상호 연결 조인트 | |
| CN114171467A (zh) | 一种半导体封装结构 | |
| US12417969B2 (en) | Semiconductor structure and circuit structure | |
| JP2015173139A (ja) | 半導体装置の製造方法、および半導体チップ積層体 | |
| TW202505578A (zh) | 中介層與其形成方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20220518 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20221202 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20230120 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20240220 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20240222 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20240514 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20240716 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20240917 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20241008 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 7570410 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |