JP7333752B2 - 基板処理方法及び基板処理装置 - Google Patents

基板処理方法及び基板処理装置 Download PDF

Info

Publication number
JP7333752B2
JP7333752B2 JP2019233668A JP2019233668A JP7333752B2 JP 7333752 B2 JP7333752 B2 JP 7333752B2 JP 2019233668 A JP2019233668 A JP 2019233668A JP 2019233668 A JP2019233668 A JP 2019233668A JP 7333752 B2 JP7333752 B2 JP 7333752B2
Authority
JP
Japan
Prior art keywords
mask
film
etched
gas
substrate processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2019233668A
Other languages
English (en)
Japanese (ja)
Other versions
JP2021103710A (ja
JP2021103710A5 (https=
Inventor
大亮 西出
隆幸 勝沼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP2019233668A priority Critical patent/JP7333752B2/ja
Priority to TW109143749A priority patent/TWI894187B/zh
Priority to CN202011472515.3A priority patent/CN113035708B/zh
Priority to KR1020200183198A priority patent/KR20210082384A/ko
Priority to US17/133,974 priority patent/US11501975B2/en
Publication of JP2021103710A publication Critical patent/JP2021103710A/ja
Publication of JP2021103710A5 publication Critical patent/JP2021103710A5/ja
Application granted granted Critical
Publication of JP7333752B2 publication Critical patent/JP7333752B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32715—Workpiece holder
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/305—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching
    • H01J37/3053—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching for evaporating or etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0418—Apparatus for fluid treatment for etching
    • H10P72/0421—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/405—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their composition, e.g. multilayer masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/332—Coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
JP2019233668A 2019-12-25 2019-12-25 基板処理方法及び基板処理装置 Active JP7333752B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2019233668A JP7333752B2 (ja) 2019-12-25 2019-12-25 基板処理方法及び基板処理装置
TW109143749A TWI894187B (zh) 2019-12-25 2020-12-11 基板處理方法及基板處理裝置
CN202011472515.3A CN113035708B (zh) 2019-12-25 2020-12-15 基片处理方法和基片处理装置
KR1020200183198A KR20210082384A (ko) 2019-12-25 2020-12-24 기판 처리 방법 및 기판 처리 장치
US17/133,974 US11501975B2 (en) 2019-12-25 2020-12-24 Substrate processing method and substrate processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019233668A JP7333752B2 (ja) 2019-12-25 2019-12-25 基板処理方法及び基板処理装置

Publications (3)

Publication Number Publication Date
JP2021103710A JP2021103710A (ja) 2021-07-15
JP2021103710A5 JP2021103710A5 (https=) 2022-10-21
JP7333752B2 true JP7333752B2 (ja) 2023-08-25

Family

ID=76459255

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019233668A Active JP7333752B2 (ja) 2019-12-25 2019-12-25 基板処理方法及び基板処理装置

Country Status (5)

Country Link
US (1) US11501975B2 (https=)
JP (1) JP7333752B2 (https=)
KR (1) KR20210082384A (https=)
CN (1) CN113035708B (https=)
TW (1) TWI894187B (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102898977B1 (ko) 2021-12-13 2025-12-11 삼성전자주식회사 플라즈마 식각 장치, 이를 이용한 플라즈마 식각 방법 및 이를 이용한 반도체 소자 제조 방법
KR20250044885A (ko) * 2022-07-29 2025-04-01 도쿄엘렉트론가부시키가이샤 기판 처리 방법 및 기판 처리 시스템
KR20240128194A (ko) * 2023-02-17 2024-08-26 피에스케이 주식회사 기판 처리 방법 및 장치
WO2025018161A1 (ja) * 2023-07-18 2025-01-23 東京エレクトロン株式会社 エッチング方法及びエッチング装置

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032908A (ja) 2004-06-16 2006-02-02 Tokyo Electron Ltd 半導体装置の製造方法
JP2007005377A (ja) 2005-06-21 2007-01-11 Tokyo Electron Ltd プラズマエッチング方法、制御プログラム、コンピュータ記憶媒体及びプラズマエッチング装置
JP2009044090A (ja) 2007-08-10 2009-02-26 Tokyo Electron Ltd 半導体装置の製造方法及び記憶媒体
WO2009154173A1 (ja) 2008-06-17 2009-12-23 株式会社アルバック 多段型基板の製造方法
JP2010514224A (ja) 2006-12-18 2010-04-30 アプライド マテリアルズ インコーポレイテッド 均一性の制御のための、塩素による多段階フォトマスクエッチング方法
JP2010135624A (ja) 2008-12-05 2010-06-17 Tokyo Electron Ltd 半導体装置の製造方法
JP2013021192A (ja) 2011-07-12 2013-01-31 Tokyo Electron Ltd プラズマエッチング方法
JP2013077594A (ja) 2011-09-29 2013-04-25 Tokyo Electron Ltd プラズマエッチング方法及び半導体装置の製造方法
JP2013258244A (ja) 2012-06-12 2013-12-26 Tokyo Electron Ltd エッチング方法及びプラズマ処理装置
JP2015170763A (ja) 2014-03-07 2015-09-28 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2016115719A (ja) 2014-12-11 2016-06-23 東京エレクトロン株式会社 プラズマエッチング方法
JP2017143194A (ja) 2016-02-10 2017-08-17 Ｓｐｐテクノロジーズ株式会社 半導体素子の製造方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01194325A (ja) * 1988-01-29 1989-08-04 Toshiba Corp ドライエッチング方法
US6569774B1 (en) * 2000-08-31 2003-05-27 Micron Technology, Inc. Method to eliminate striations and surface roughness caused by dry etch
JP3962339B2 (ja) * 2002-03-27 2007-08-22 松下電器産業株式会社 電子デバイスの製造方法
JP2006060044A (ja) * 2004-08-20 2006-03-02 Canon Anelva Corp 磁気抵抗効果素子の製造方法
KR100606540B1 (ko) * 2004-12-22 2006-08-01 동부일렉트로닉스 주식회사 반도체 소자의 구리 배선 형성 방법
US7902078B2 (en) * 2006-02-17 2011-03-08 Tokyo Electron Limited Processing method and plasma etching method
CN101295643B (zh) * 2007-04-24 2010-05-19 中芯国际集成电路制造(上海)有限公司 通孔刻蚀方法及通孔掩膜
JP5067068B2 (ja) * 2007-08-17 2012-11-07 東京エレクトロン株式会社 半導体装置の製造方法及び記憶媒体
CN101800174A (zh) * 2010-02-11 2010-08-11 中微半导体设备(上海)有限公司 一种含碳层的等离子刻蚀方法
US8476168B2 (en) * 2011-01-26 2013-07-02 International Business Machines Corporation Non-conformal hardmask deposition for through silicon etch
US9666414B2 (en) * 2011-10-27 2017-05-30 Applied Materials, Inc. Process chamber for etching low k and other dielectric films
US20150079760A1 (en) * 2013-09-19 2015-03-19 Wei-Sheng Lei Alternating masking and laser scribing approach for wafer dicing using laser scribing and plasma etch
WO2018026867A1 (en) * 2016-08-01 2018-02-08 Lam Research Corporation Technique to deposit sidewall passivation for high aspect ratio cylinder etch
JP6836953B2 (ja) 2016-12-13 2021-03-03 東京エレクトロン株式会社 窒化シリコンから形成された第１領域を酸化シリコンから形成された第２領域に対して選択的にエッチングする方法
KR102904323B1 (ko) * 2019-02-27 2025-12-24 램 리써치 코포레이션 희생 층을 사용한 반도체 마스크 재성형
CN112151608B (zh) * 2019-06-28 2023-12-15 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032908A (ja) 2004-06-16 2006-02-02 Tokyo Electron Ltd 半導体装置の製造方法
JP2007005377A (ja) 2005-06-21 2007-01-11 Tokyo Electron Ltd プラズマエッチング方法、制御プログラム、コンピュータ記憶媒体及びプラズマエッチング装置
JP2010514224A (ja) 2006-12-18 2010-04-30 アプライド マテリアルズ インコーポレイテッド 均一性の制御のための、塩素による多段階フォトマスクエッチング方法
JP2009044090A (ja) 2007-08-10 2009-02-26 Tokyo Electron Ltd 半導体装置の製造方法及び記憶媒体
WO2009154173A1 (ja) 2008-06-17 2009-12-23 株式会社アルバック 多段型基板の製造方法
JP2010135624A (ja) 2008-12-05 2010-06-17 Tokyo Electron Ltd 半導体装置の製造方法
JP2013021192A (ja) 2011-07-12 2013-01-31 Tokyo Electron Ltd プラズマエッチング方法
JP2013077594A (ja) 2011-09-29 2013-04-25 Tokyo Electron Ltd プラズマエッチング方法及び半導体装置の製造方法
JP2013258244A (ja) 2012-06-12 2013-12-26 Tokyo Electron Ltd エッチング方法及びプラズマ処理装置
JP2015170763A (ja) 2014-03-07 2015-09-28 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2016115719A (ja) 2014-12-11 2016-06-23 東京エレクトロン株式会社 プラズマエッチング方法
JP2017143194A (ja) 2016-02-10 2017-08-17 Ｓｐｐテクノロジーズ株式会社 半導体素子の製造方法

Also Published As

Publication number Publication date
JP2021103710A (ja) 2021-07-15
KR20210082384A (ko) 2021-07-05
US20210202262A1 (en) 2021-07-01
CN113035708B (zh) 2025-09-12
TWI894187B (zh) 2025-08-21
CN113035708A (zh) 2021-06-25
TW202129756A (zh) 2021-08-01
US11501975B2 (en) 2022-11-15

Similar Documents

Publication Publication Date Title
JP7333752B2 (ja) 基板処理方法及び基板処理装置
KR101029947B1 (ko) 플라즈마 에칭 성능 강화를 위한 방법
KR102581284B1 (ko) 공극을 형성하기 위한 시스템들 및 방법들
KR20190037341A (ko) 원하는 피쳐를 얻기 위해 에칭 프로세싱 중에 ulk 물질을 손상으로부터 보호하기 위한 제조 방법
KR101075045B1 (ko) 플라즈마 에칭 성능 강화를 위한 방법
KR20220154787A (ko) 알루미늄 함유 막 제거를 위한 시스템들 및 방법들
KR20170058863A (ko) 플라즈마 에칭 방법
JP2008198659A (ja) プラズマエッチング方法
KR20110030295A (ko) 마스크 패턴의 형성 방법 및 반도체 장치의 제조 방법
US11121002B2 (en) Systems and methods for etching metals and metal derivatives
TW201937593A (zh) 電漿蝕刻方法及電漿蝕刻裝置
TW202213459A (zh) 以氧脈衝蝕刻結構的方法
JP7483933B2 (ja) 窒化物含有膜除去のためのシステム及び方法
JP2024001464A (ja) エッチング方法及びプラズマ処理装置
US10256112B1 (en) Selective tungsten removal
US20180158654A1 (en) Etching method and plasma processing apparatus
JP2019029619A (ja) 被処理体を処理する方法
US10128086B1 (en) Silicon pretreatment for nitride removal
JP7572123B2 (ja) 基板処理方法及び基板処理装置
WO2022244678A1 (ja) 基板処理方法及び基板処理装置
KR20220136136A (ko) 에칭 방법 및 에칭 처리 장치
WO2022039849A1 (en) Methods for etching structures and smoothing sidewalls
US12604690B2 (en) Systems and methods for selective metal-containing hardmask removal
JP7678213B2 (ja) 遷移金属窒化物材料の選択的除去
US20240258116A1 (en) Systems and methods for titanium-containing film removal

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20221012

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20221012

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20230706

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230718

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20230815

R150 Certificate of patent or registration of utility model

Ref document number: 7333752

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150