JP6829733B2 - 抵抗変化型ランダムアクセスメモリ - Google Patents
抵抗変化型ランダムアクセスメモリ Download PDFInfo
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- JP6829733B2 JP6829733B2 JP2019005316A JP2019005316A JP6829733B2 JP 6829733 B2 JP6829733 B2 JP 6829733B2 JP 2019005316 A JP2019005316 A JP 2019005316A JP 2019005316 A JP2019005316 A JP 2019005316A JP 6829733 B2 JP6829733 B2 JP 6829733B2
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- 229910052710 silicon Inorganic materials 0.000 description 4
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- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/003—Cell access
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
- H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
- H10B63/845—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays the switching components being connected to a common vertical conductor
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
- G11C13/0026—Bit-line or column circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
- G11C13/0028—Word-line or row circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0038—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0097—Erasing, e.g. resetting, circuits or methods
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/253—Multistable switching devices, e.g. memristors having three or more electrodes, e.g. transistor-like devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
- G11C2013/0045—Read using current through the cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/0078—Write using current through the cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/009—Write using potential difference applied between cell electrodes
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/72—Array wherein the access device being a diode
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/78—Array wherein the memory cells of a group share an access device, all the memory cells of the group having a common electrode and the access device being not part of a word line or a bit line driver
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/79—Array wherein the access device being a transistor
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/82—Array having, for accessing a cell, a word line, a bit line and a plate or source line receiving different potentials
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Networks Using Active Elements (AREA)
Description
110:メモリアレイ
120:行デコーダおよび駆動回路(X−DEC)
130:列デコーダおよび駆動回路(Y−DEC)
140:列選択回路(YMUX)
150:制御回路
160:センスアンプ
170:書込みドライバ・読出しバイアス回路170
Claims (6)
- 可逆性かつ不揮発性の可変抵抗素子にデータを記憶する抵抗変化型メモリであって、
基板表面に形成された複数のアクセス用トランジスタと、
基板表面上に垂直方向に積層された複数の可変抵抗素子であって、1つのアクセス用トランジスタの一方の電極には、複数の可変抵抗素子のそれぞれの一方の電極が電気的に共通に接続される、前記複数の可変抵抗素子とを有し、
前記複数の可変抵抗素子のそれぞれの他方の電極に対応するビット線がそれぞれ電気的に接続され、前記複数のアクセス用トランジスタのそれぞれの他方の電極にソース線が電気的に接続され、行方向のアクセス用トランジスタの各ゲートにワード線が共通に接続され、前記ワード線と前記ビット線は平行であり、
前記複数の可変抵抗素子が多層配線構造の各階層の配線上にそれぞれ形成され、配線間の層間絶縁膜に形成されたビアホール内に前記可変抵抗素子とダイオードと金属プラグとが順に積層され、前記可変抵抗素子が下層の配線に電気的に接続され、前記金属プラグがビット線を構成する上層の配線に電気的に接続される、抵抗変化型メモリ。 - 前記複数の可変抵抗素子のそれぞれとビット線との間には、一定以上のバイアスが印加されたときに電流を流すダイオードが接続される、請求項1に記載の抵抗変化型メモリ。
- 前記ダイオードは、順方向バイアスが印加されたとき順方向の電流を流し、逆方向バイアスが印加されたとき逆方向の電流を流す、請求項2に記載の抵抗変化型メモリ。
- 複数の可変抵抗素子は、前記多層配線構造の各階層において互いに異なる位置に形成される、請求項1に記載の可変抵抗型メモリ。
- 可変抵抗素子は、遷移金属酸化物を含む、請求項1ないし4いずれか1つに記載の抵抗変化型メモリ。
- 前記複数のビット線と前記複数のソース線は、メモリセルアレイ上において直交する、請求項1に記載の抵抗変化型メモリ。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2019005316A JP6829733B2 (ja) | 2019-01-16 | 2019-01-16 | 抵抗変化型ランダムアクセスメモリ |
TW108131685A TWI771611B (zh) | 2019-01-16 | 2019-09-03 | 電阻式記憶體 |
CN201910919104.5A CN111445937B (zh) | 2019-01-16 | 2019-09-26 | 电阻式存储器 |
KR1020190134606A KR102414814B1 (ko) | 2019-01-16 | 2019-10-28 | 저항형 메모리 |
US16/666,421 US11222923B2 (en) | 2019-01-16 | 2019-10-29 | Resistance variable memory |
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JP2019005316A JP6829733B2 (ja) | 2019-01-16 | 2019-01-16 | 抵抗変化型ランダムアクセスメモリ |
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JP2020113702A JP2020113702A (ja) | 2020-07-27 |
JP6829733B2 true JP6829733B2 (ja) | 2021-02-10 |
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US (1) | US11222923B2 (ja) |
JP (1) | JP6829733B2 (ja) |
KR (1) | KR102414814B1 (ja) |
CN (1) | CN111445937B (ja) |
TW (1) | TWI771611B (ja) |
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JP2021039815A (ja) * | 2019-09-05 | 2021-03-11 | キオクシア株式会社 | 半導体記憶装置 |
US11417375B2 (en) * | 2019-12-17 | 2022-08-16 | Micron Technology, Inc. | Discharge current mitigation in a memory array |
US11711926B2 (en) * | 2020-09-18 | 2023-07-25 | Macronix International Co., Ltd. | Memory array and memory structure |
US12014780B2 (en) | 2021-06-10 | 2024-06-18 | National Central University | Memory circuit, memory device and operation method thereof |
US11776595B2 (en) * | 2022-01-25 | 2023-10-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory device with source line control |
JP2024115608A (ja) * | 2023-02-15 | 2024-08-27 | ウィンボンド エレクトロニクス コーポレーション | フラッシュメモリ |
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JP6430576B2 (ja) * | 2017-04-19 | 2018-11-28 | ウィンボンド エレクトロニクス コーポレーション | 抵抗変化型ランダムアクセスメモリ |
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- 2019-01-16 JP JP2019005316A patent/JP6829733B2/ja active Active
- 2019-09-03 TW TW108131685A patent/TWI771611B/zh active
- 2019-09-26 CN CN201910919104.5A patent/CN111445937B/zh active Active
- 2019-10-28 KR KR1020190134606A patent/KR102414814B1/ko active IP Right Grant
- 2019-10-29 US US16/666,421 patent/US11222923B2/en active Active
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TW202029195A (zh) | 2020-08-01 |
US20200227476A1 (en) | 2020-07-16 |
KR20200089590A (ko) | 2020-07-27 |
US11222923B2 (en) | 2022-01-11 |
KR102414814B1 (ko) | 2022-06-30 |
CN111445937B (zh) | 2022-03-08 |
JP2020113702A (ja) | 2020-07-27 |
TWI771611B (zh) | 2022-07-21 |
CN111445937A (zh) | 2020-07-24 |
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