JP6810725B2 - 抵抗変化型ランダムアクセスメモリ - Google Patents
抵抗変化型ランダムアクセスメモリ Download PDFInfo
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Description
110:メモリアレイ
120:行デコーダおよび駆動回路(X−DEC)
130:列デコーダおよび駆動回路(Y−DEC)
140:列選択回路(YMUX)
150:制御回路
160:センスアンプ
170:書込みドライバ・読出しバイアス回路170
Claims (13)
- 可逆性かつ不揮発性の可変抵抗素子によりデータを記憶する抵抗変化型メモリであって、
前記可変抵抗素子と当該可変抵抗素子に接続されたアクセス用のトランジスタとを含むメモリセルが行列状に複数配置されたアレイ領域と、
前記アレイ領域の行方向に延在し、行方向のメモリセルに接続された複数のワード線と、
前記アレイ領域の列方向に延在する少なくとも1つのビット線と、
前記アレイ領域の列方向に延在し、列方向のメモリセルの一方の電極に接続された複数のソース線と、
前記少なくとも1つのビット線に接続され、かつ前記アレイ領域の行方向に延在し、行方向のメモリセルの他方の電極に接続されたシェアードビット線とを有し、
前記少なくとも1つのビット線は、ダミーのビット線として機能する、抵抗変化型メモリ。 - 前記少なくとも1つのビット線は、その直下に位置するメモリセルから分離されている、請求項1に記載の抵抗変化型メモリ。
- 前記少なくとも1つのビット線は、その直下に位置するメモリセルと短絡されている、請求項1に記載の抵抗変化型メモリ。
- 前記シェアードビット線は、前記ワード線と並行に延在する、請求項1に記載の抵抗変化型メモリ。
- 前記アレイ領域のメモリセルがn行×q列で構成されるとき、前記シェアードビット線は、行方向のq個のメモリセルによってシェアーされる、請求項1に記載の抵抗変化型メモリ。
- 前記アレイ領域は、メモリアレイを複数に分割した領域である、請求項1に記載の抵抗変化型メモリ。
- 可逆性かつ不揮発性の可変抵抗素子によりデータを記憶する抵抗変化型メモリであって、
前記可変抵抗素子と当該可変抵抗素子に接続されたアクセス用のトランジスタとを含むメモリセルが行列状に複数配置されたアレイ領域と、
前記アレイ領域の行方向に延在し、行方向のメモリセルに接続された複数のワード線と、
前記アレイ領域の列方向に延在し、列方向のメモリセルの一方の電極に接続された複数のビット線と、
前記アレイ領域の列方向に延在する少なくとも1つのソース線と、
前記少なくとも1つのソース線に接続され、かつ前記アレイ領域の行方向に延在し、行方向のメモリセルの他方の電極に接続されたシェアードソース線とを有し、
前記ビット線および前記少なくとも1つのソース線は、第1レベルの金属層で形成され、前記シェアードソース線は、第1レベルよりも下層の第2レベルの金属層で形成され、
第1レベルの金属層と第2レベルの金属層との間の選択された位置に前記可変抵抗素子が形成され、
前記少なくとも1つのソース線は、前記シェアードソース線との交差部において前記シェアードソース線に電気的に接続され、
前記少なくとも1つのソース線は、ダミーのソース線として機能し、前記少なくとも1つのソース線は、その直下に位置する前記可変抵抗素子から分離されている、抵抗変化型メモリ。 - 可逆性かつ不揮発性の可変抵抗素子によりデータを記憶する抵抗変化型メモリであって、
前記可変抵抗素子と当該可変抵抗素子に接続されたアクセス用のトランジスタとを含むメモリセルが行列状に複数配置されたアレイ領域と、
前記アレイ領域の行方向に延在し、行方向のメモリセルに接続された複数のワード線と、
前記アレイ領域の列方向に延在し、列方向のメモリセルの一方の電極に接続された複数のビット線と、
前記アレイ領域の列方向に延在する少なくとも1つのソース線と、
前記少なくとも1つのソース線に接続され、かつ前記アレイ領域の行方向に延在し、行方向のメモリセルの他方の電極に接続されたシェアードソース線とを有し、
前記ビット線および前記少なくとも1つのソース線は、第1レベルの金属層で形成され、前記シェアードソース線は、第1レベルよりも下層の第2レベルの金属層で形成され、
第1レベルの金属層と第2レベルの金属層との間の選択された位置に前記可変抵抗素子が形成され、
前記少なくとも1つのソース線は、前記シェアードソース線との交差部において前記シェアードソース線に電気的に接続され、
前記少なくとも1つのソース線は、ダミーのソース線として機能し、前記少なくとも1つのソース線は、その直下に位置する前記可変抵抗素子と短絡されている、抵抗変化型メモリ。 - 前記シェアードソース線は、前記ワード線と並行に延在する、請求項7または8に記載の抵抗変化型メモリ。
- 前記アレイ領域のメモリセルがn行×q列で構成されるとき、前記シェアードソース線は、行方向のq個のメモリセルによってシェアーされる、請求項7または8に記載の抵抗変化型メモリ。
- 前記アレイ領域は、メモリアレイを複数に分割した領域である、請求項7または8に記載の抵抗変化型メモリ。
- 前記少なくとも1つのビット線と前記複数のソース線が少なくとも同一の配線層で形成され、前記シェアードビット線は、前記配線層より下層の配線層で形成される、請求項1記載の抵抗変化型メモリ。
- 前記少なくとも1つのソース線と前記複数のビット線が少なくとも同一の配線層で形成され、前記シェアードソース線は、前記配線層より下層の配線層で形成される、請求項7または8記載の抵抗変化型メモリ。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
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JP2018188003A JP6810725B2 (ja) | 2018-10-03 | 2018-10-03 | 抵抗変化型ランダムアクセスメモリ |
TW108129046A TWI708411B (zh) | 2018-10-03 | 2019-08-15 | 可變電阻式記憶體 |
CN201910885759.5A CN110993003B (zh) | 2018-10-03 | 2019-09-19 | 可变电阻式存储器 |
KR1020190119178A KR102224973B1 (ko) | 2018-10-03 | 2019-09-26 | 저항 변화형 랜덤 액세스 메모리 |
US16/591,944 US11257865B2 (en) | 2018-10-03 | 2019-10-03 | Resistive memory |
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CN113782077A (zh) * | 2020-06-09 | 2021-12-10 | 上海磁宇信息科技有限公司 | 磁性随机存储器 |
JP7150787B2 (ja) * | 2020-07-31 | 2022-10-11 | ウィンボンド エレクトロニクス コーポレーション | 抵抗変化型クロスバーアレイ装置 |
CN117881189A (zh) * | 2020-11-13 | 2024-04-12 | 武汉新芯集成电路制造有限公司 | 半导体器件 |
TWI772237B (zh) * | 2020-12-18 | 2022-07-21 | 力旺電子股份有限公司 | 記憶體裝置及其操作方法 |
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JP4460552B2 (ja) * | 2006-07-04 | 2010-05-12 | シャープ株式会社 | 半導体記憶装置 |
JP4655000B2 (ja) | 2006-08-01 | 2011-03-23 | セイコーエプソン株式会社 | 可変抵抗素子および抵抗変化型メモリ装置 |
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US8053749B2 (en) * | 2008-11-07 | 2011-11-08 | Seagate Technology Llc | Mirrored-gate cell for non-volatile memory |
US7940548B2 (en) * | 2009-07-13 | 2011-05-10 | Seagate Technology Llc | Shared bit line and source line resistive sense memory structure |
JP5351863B2 (ja) | 2010-09-17 | 2013-11-27 | シャープ株式会社 | 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の制御方法 |
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US9324426B2 (en) * | 2014-06-02 | 2016-04-26 | Integrated Silicon Solution, Inc. | Method for improving sensing margin of resistive memory |
KR102374228B1 (ko) * | 2015-08-27 | 2022-03-15 | 삼성전자주식회사 | 저항성 메모리 장치의 부스트 전압 생성기, 이를 포함하는 전압 생성기 및 이를 포함하는 저항성 메모리 장치 |
US9496314B1 (en) * | 2015-09-14 | 2016-11-15 | Qualcomm Incorporated | Shared source line magnetic tunnel junction (MTJ) bit cells employing uniform MTJ connection patterns for reduced area |
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JP2020057707A (ja) | 2020-04-09 |
KR20200038855A (ko) | 2020-04-14 |
CN110993003B (zh) | 2021-12-03 |
TW202015264A (zh) | 2020-04-16 |
US11257865B2 (en) | 2022-02-22 |
US20200111836A1 (en) | 2020-04-09 |
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