JP6828449B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP6828449B2 JP6828449B2 JP2017006002A JP2017006002A JP6828449B2 JP 6828449 B2 JP6828449 B2 JP 6828449B2 JP 2017006002 A JP2017006002 A JP 2017006002A JP 2017006002 A JP2017006002 A JP 2017006002A JP 6828449 B2 JP6828449 B2 JP 6828449B2
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- Prior art keywords
- insulating film
- interlayer insulating
- semiconductor
- contact hole
- semiconductor device
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Description
第1実施形態について説明する。ここでは半導体装置として、トレンチゲート構造の反転型のMOSFETを半導体素子とするSiC半導体装置を例に挙げて説明する。
図3(a)は、(1)の工程を行ったときの断面図である。まず、トレンチゲート構造を形成し、半導体の表面、つまりp型ベース領域3やn+型ソース領域4びコンタクト領域3aの表面に形成されたゲート絶縁膜7やゲート電極8の上に、層間絶縁膜10を成膜する。層間絶縁膜10としては、流動性のある酸化膜となるPBSGを用いているが、BPSGの他、PSG(phospho silicate glassの略)、やBSG(Boron silicate glassの略)を用いることもできる。
図3(b)は、(2)の工程を行ったときの断面図である。この工程では、(1)の工程によって形成したコンタクトホール10aの底部に金属シリサイド9aを形成する。まず、(1)の工程から(2)の工程に至るまでの間に、コンタクトホール10aの底面に自然酸化膜が形成されている可能性があることから、HF(フッ酸)を用いて自然酸化膜をエッチングする。そして、コンタクトホール10a内を含めて層間絶縁膜10の上にNi膜を成膜したのち、例えば600〜750℃の加熱による1回目の金属シンターを行い、コンタクトホール10aの底面のSiC中に存在するSiとNi膜中のNiとをシリサイド化反応させる。これにより、Ni−Siにて構成される金属シリサイド9aが形成される。
図3(c)は、(3)の工程を行ったときの断面図である。図示しないが層間絶縁膜10の上に図示しないフォトレジストを成膜したのち、露光および現像を行い、さらにUV照射を行うことでフォトレジストをパターニングする。これにより、フォトレジストのうちコンタクトホール10bの形成予定領域が開口させられ、フォトレジストによるマスクが形成される。そして、このフォトレジストによるマスクを用いて、層間絶縁膜10をエッチングすることで、層間絶縁膜10に対してゲートパッド31のためのコンタクトホール10bを形成する。
図3(d)は、(4)の工程を行ったときの断面図である。まず、(3)の工程から(4)の工程に至るまでの間に、コンタクトホール10a、10bの底面に自然酸化膜が形成されている可能性があることから、HFを用いて自然酸化膜をエッチングする。そして、コンタクトホール10a、10b内を含めて層間絶縁膜10の上にスパッタリング等によってTi/TiN膜を成膜する。これにより、バリアメタル9b、31aを形成するための金属膜が形成される。
第2実施形態について説明する。本実施形態は、第1実施形態に対してH2アニールの工程順序を変更したものであり、その他については第1実施形態と同様であるため、第1実施形態と異なる部分についてのみ説明する。
本発明は上記した実施形態に限定されるものではなく、特許請求の範囲に記載した範囲内において適宜変更が可能である。
4 n+型ソース領域
9 ソース電極
9a 金属シリサイド
9b、31a バリアメタル
9c、31b Wプラグ
9d、31c Al−Si層
10 層間絶縁膜
10a、10b コンタクトホール
Claims (13)
- 半導体素子が形成された半導体(1〜5)と、
前記半導体の上に形成され、前記半導体素子に繋がるコンタクトホール(10a)を有し、リンとボロンの少なくとも一方を含んで構成された層間絶縁膜(10)と、
前記層間絶縁膜の上に形成され、前記コンタクトホールを通じて前記半導体素子と接続される金属電極(9d)と、を有し、
前記層間絶縁膜内に水素が充填されており、
さらに、前記層間絶縁膜にはリンが含まれており、該層間絶縁膜内においてリン濃度分布の極大値がある半導体装置。 - 半導体素子が形成された半導体(1〜5)と、
前記半導体の上に形成され、前記半導体素子に繋がるコンタクトホール(10a)を有し、リンとボロンの少なくとも一方を含んで構成された層間絶縁膜(10)と、
前記層間絶縁膜の上に形成され、前記コンタクトホールを通じて前記半導体素子と接続される金属電極(9d)と、を有し、
前記層間絶縁膜内に水素が充填されており、
前記層間絶縁膜内における水素濃度が1×1020cm−3以上であって、
前記層間絶縁膜にはリンが含まれており、該層間絶縁膜内においてリン濃度分布の極大値がある半導体装置。 - 前記層間絶縁膜内の全域においてリン濃度が2wt%以上である請求項1または2に記載の半導体装置。
- 前記層間絶縁膜にはボロンが含まれており、該層間絶縁膜内の全域においてボロン濃度が2wt%である請求項1ないし3のいずれか1つに記載の半導体装置。
- 前記コンタクトホール中には、タングステンプラグ(9c)が埋め込まれており、前記金属電極の下地面が平坦とされている請求項1ないし4のいずれか1つに記載の半導体装置。
- 前記コンタクトホールは、上面形状が正方形で構成され、該正方形の一辺の長さが0.3〜0.6μmとされていて、前記層間絶縁膜の底面と該コンタクトホールの側面との成す角度を側壁角として、該側壁角が85°以上である請求項1ないし5のいずれか1つに記載の半導体装置。
- 前記コンタクトホールは、上面形状が長方形のライン状で構成され、該長方形の短辺の長さが0.3〜0.6μmとされていて、前記層間絶縁膜の底面と該コンタクトホールの側面との成す角度を側壁角として、該側壁角が85°以上である請求項1ないし5のいずれか1つに記載の半導体装置。
- 前記半導体のうち前記半導体素子が形成されたセル部と、該セル部を囲むガードリング部を含む外周部とを有し、前記ガードリング部において前記半導体に凹部(20)が形成されていて、前記セル部と前記ガードリング部との間において段差が構成されており、
前記層間絶縁膜は、前記段差も覆うように形成されている請求項1ないし7のいずれか1つに記載の半導体装置。 - 前記半導体と前記層間絶縁膜との間には、前記層間絶縁膜よりも水素濃度が低い下地絶縁膜(7)が形成されている請求項1ないし8のいずれか1つに記載の半導体装置。
- 前記下地絶縁膜の水素濃度は1×1020cm−3未満である請求項9に記載の半導体装置。
- 前記層間絶縁膜と前記下地絶縁膜との界面において、前記層間絶縁膜および前記下地絶縁膜の双方を含めた膜内における水素濃度が極大値となっている請求項9または10に記載の半導体装置。
- 前記半導体素子は、
前記半導体として、裏面側が第1導電型もしくは第2導電型の高濃度不純物層(1)とされていると共に表面側が前記高濃度不純物層よりも低不純物濃度とされた第1導電型のドリフト層(2)とされ、炭化珪素にて構成された半導体基板(1、2)と、前記ドリフト層の上に形成された第2導電型の炭化珪素からなるベース領域(3)と、前記ベース領域の上に形成され、前記ドリフト層よりも高不純物濃度の第1導電型の炭化珪素で構成されたソース領域(4)と、を有し、
さらに、前記ソース領域の表面から前記ベース領域よりも深くまで形成されたゲートトレンチ(6)内に形成され、該ゲートトレンチの内壁面に形成されたゲート絶縁膜(7)と、前記ゲート絶縁膜の上に形成されたゲート電極(8)と、を有して構成されたトレンチゲート構造と、
前記ソース領域および前記ベース領域に接続された第1電極(9)と、
前記高濃度不純物層に接続された第2電極(11)と、を有しており、
前記ゲート絶縁膜は、前記下地絶縁膜を構成しており、
前記金属電極は、前記第1電極に含まれている請求項9ないし11のいずれか1つに記載の半導体装置。 - 半導体素子が形成された半導体(1〜5)と、
前記半導体の上に形成され、前記半導体素子に繋がるコンタクトホール(10a)を有し、リンとボロンの少なくとも一方を含んで構成された層間絶縁膜(10)と、
前記層間絶縁膜の上に形成され、前記コンタクトホールを通じて前記半導体素子と接続される金属電極(9d)と、を有し、
前記半導体のうち前記半導体素子が形成されたセル部と、該セル部を囲むガードリング部を含む外周部とを有し、前記ガードリング部において前記半導体に凹部(20)が形成されていて、前記セル部と前記ガードリング部との間において段差が構成されており、
前記層間絶縁膜が前記段差も覆うように形成される半導体装置の製造方法であって、
前記凹部が形成されることで前記段差が構成された前記半導体の上に前記層間絶縁膜を成膜することと、
リフローを行うことで、前記層間絶縁膜を流動させ、前記段差を所定の膜厚の前記層間絶縁膜で覆うことと、
前記段差を所定の膜厚の前記層間絶縁膜で覆うことの後に、前記コンタクトホールを形成することと、
前記コンタクトホールを形成することの後に、水素アニールを870℃以上で行うことで、前記層間絶縁膜内に水素を充填して該層間絶縁膜の緻密化処理を行うことと、を含んでいる半導体装置の製造方法。
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Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0456222A (ja) * | 1990-06-25 | 1992-02-24 | Matsushita Electron Corp | 半導体装置の製造方法 |
JPH0582781A (ja) * | 1991-09-24 | 1993-04-02 | Nec Yamagata Ltd | 半導体集積回路装置 |
JPH06177129A (ja) * | 1992-12-09 | 1994-06-24 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
JP2757782B2 (ja) * | 1994-06-30 | 1998-05-25 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3543504B2 (ja) * | 1996-08-06 | 2004-07-14 | ソニー株式会社 | 半導体装置の製造方法 |
JP2002134607A (ja) * | 2000-10-20 | 2002-05-10 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
DE112004003004T5 (de) * | 2004-10-25 | 2007-10-25 | Spansion Llc, Sunnyvale | Halbleiterbauelement und Verfahren zu dessen Herstellung |
JP2007096263A (ja) | 2005-08-31 | 2007-04-12 | Denso Corp | 炭化珪素半導体装置およびその製造方法。 |
KR100872981B1 (ko) * | 2007-07-19 | 2008-12-08 | 주식회사 동부하이텍 | 반도체 소자의 제조방법 |
EP2091083A3 (en) | 2008-02-13 | 2009-10-14 | Denso Corporation | Silicon carbide semiconductor device including a deep layer |
JP2010165778A (ja) * | 2009-01-14 | 2010-07-29 | Sharp Corp | 半導体装置の製造方法 |
JP5813303B2 (ja) | 2009-11-20 | 2015-11-17 | 株式会社日立国際電気 | 半導体装置の製造方法、基板処理方法および基板処理装置 |
JP5770892B2 (ja) * | 2009-11-20 | 2015-08-26 | 株式会社日立国際電気 | 半導体装置の製造方法、基板処理方法および基板処理装置 |
KR101995682B1 (ko) * | 2011-03-18 | 2019-07-02 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 산화물 반도체막, 반도체 장치, 및 반도체 장치의 제작 방법 |
JP2013041919A (ja) | 2011-08-12 | 2013-02-28 | Renesas Electronics Corp | 半導体装置の製造方法 |
JP6245723B2 (ja) | 2012-04-27 | 2017-12-13 | 富士電機株式会社 | 炭化珪素半導体装置の製造方法 |
JP2014027076A (ja) * | 2012-07-26 | 2014-02-06 | Renesas Electronics Corp | 半導体装置 |
JP6160477B2 (ja) * | 2013-12-25 | 2017-07-12 | トヨタ自動車株式会社 | 半導体装置 |
WO2016080269A1 (ja) * | 2014-11-17 | 2016-05-26 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
DE112016000071T5 (de) * | 2015-02-03 | 2017-03-23 | Fuji Electric Co., Ltd. | Halbleitervorrichtung und Verfahren zu ihrer Herstellung |
JP6409681B2 (ja) | 2015-05-29 | 2018-10-24 | 株式会社デンソー | 半導体装置およびその製造方法 |
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