JP6657516B2 - Ｒｆ用途のための半導体オンインシュレータ基板 - Google Patents

Ｒｆ用途のための半導体オンインシュレータ基板 Download PDF

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JP6657516B2
JP6657516B2 JP2018550442A JP2018550442A JP6657516B2 JP 6657516 B2 JP6657516 B2 JP 6657516B2 JP 2018550442 A JP2018550442 A JP 2018550442A JP 2018550442 A JP2018550442 A JP 2018550442A JP 6657516 B2 JP6657516 B2 JP 6657516B2
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layer
semiconductor
substrate
insulator
interstitial
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JP2019514202A (ja
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アルノー カステス，
アルノー カステス，
オレグ クローシュカ，
オレグ クローシュカ，
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Soitec SA
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Soitec SA
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
JP2018550442A 2016-03-31 2017-03-30 Ｒｆ用途のための半導体オンインシュレータ基板 Active JP6657516B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR1652782 2016-03-31
FR1652782A FR3049763B1 (fr) 2016-03-31 2016-03-31 Substrat semi-conducteur sur isolant pour applications rf
PCT/EP2017/057614 WO2017167923A1 (en) 2016-03-31 2017-03-30 Semiconductor on insulator substrate for rf applications

Publications (2)

Publication Number Publication Date
JP2019514202A JP2019514202A (ja) 2019-05-30
JP6657516B2 true JP6657516B2 (ja) 2020-03-04

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JP2018550442A Active JP6657516B2 (ja) 2016-03-31 2017-03-30 Ｒｆ用途のための半導体オンインシュレータ基板

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US (3) US10886162B2 (enExample)
JP (1) JP6657516B2 (enExample)
KR (1) KR102172705B1 (enExample)
CN (1) CN109075120B (enExample)
DE (1) DE112017001617T5 (enExample)
FR (1) FR3049763B1 (enExample)
TW (1) TWI720161B (enExample)
WO (1) WO2017167923A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3049763B1 (fr) * 2016-03-31 2018-03-16 Soitec Substrat semi-conducteur sur isolant pour applications rf
WO2018080772A1 (en) * 2016-10-26 2018-05-03 Sunedison Semiconductor Limited High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
FR3079662B1 (fr) * 2018-03-30 2020-02-28 Soitec Substrat pour applications radiofrequences et procede de fabrication associe
WO2020072212A1 (en) * 2018-10-01 2020-04-09 Applied Materials, Inc. Method of forming an rf silicon on insulator device
TWI815970B (zh) 2018-11-09 2023-09-21 日商日本碍子股份有限公司 壓電性材料基板與支持基板的接合體、及其製造方法
FR3103631B1 (fr) 2019-11-25 2022-09-09 Commissariat Energie Atomique Dispositif électronique integré comprenant une bobine et procédé de fabrication d’un tel dispositif
CN110890418B (zh) * 2019-12-02 2021-11-05 中国科学院上海微系统与信息技术研究所 一种具有双埋氧层的晶体管结构及其制备方法
FR3104322B1 (fr) 2019-12-05 2023-02-24 Soitec Silicon On Insulator Procédé de formation d'un substrat de manipulation pour une structure composite ciblant des applications rf
JP7392578B2 (ja) * 2020-06-05 2023-12-06 信越半導体株式会社 高周波半導体装置の製造方法及び高周波半導体装置
FR3119046B1 (fr) * 2021-01-15 2022-12-23 Applied Materials Inc Substrat support en silicium adapte aux applications radiofrequences et procede de fabrication associe
CN114823903A (zh) * 2021-01-27 2022-07-29 中国科学院微电子研究所 一种单结晶体管结构及其制造方法
TWI761255B (zh) 2021-07-08 2022-04-11 環球晶圓股份有限公司 晶圓及晶圓的製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001168308A (ja) * 1999-09-30 2001-06-22 Canon Inc シリコン薄膜の製造方法、ｓｏｉ基板の作製方法及び半導体装置
JP2004537161A (ja) * 2001-04-11 2004-12-09 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド 高抵抗率ｃｚシリコンにおけるサーマルドナー生成の制御
US7529433B2 (en) * 2007-01-12 2009-05-05 Jds Uniphase Corporation Humidity tolerant electro-optic device
US8078565B2 (en) * 2007-06-12 2011-12-13 Kana Software, Inc. Organically ranked knowledge categorization in a knowledge management system
US7883990B2 (en) * 2007-10-31 2011-02-08 International Business Machines Corporation High resistivity SOI base wafer using thermally annealed substrate
FR2953640B1 (fr) * 2009-12-04 2012-02-10 S O I Tec Silicon On Insulator Tech Procede de fabrication d'une structure de type semi-conducteur sur isolant, a pertes electriques diminuees et structure correspondante
EP2686878B1 (en) * 2011-03-16 2016-05-18 MEMC Electronic Materials, Inc. Silicon on insulator structures having high resistivity regions in the handle wafer and methods for producing such structures
FR2973158B1 (fr) * 2011-03-22 2014-02-28 Soitec Silicon On Insulator Procédé de fabrication d'un substrat de type semi-conducteur sur isolant pour applications radiofréquences
US8536035B2 (en) * 2012-02-01 2013-09-17 International Business Machines Corporation Silicon-on-insulator substrate and method of forming
FR2999801B1 (fr) * 2012-12-14 2014-12-26 Soitec Silicon On Insulator Procede de fabrication d'une structure
WO2015112308A1 (en) 2014-01-23 2015-07-30 Sunedison Semiconductor Limited High resistivity soi wafers and a method of manufacturing thereof
US9853133B2 (en) * 2014-09-04 2017-12-26 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
FR3049763B1 (fr) * 2016-03-31 2018-03-16 Soitec Substrat semi-conducteur sur isolant pour applications rf

Also Published As

Publication number Publication date
KR102172705B1 (ko) 2020-11-02
TW201803015A (zh) 2018-01-16
WO2017167923A1 (en) 2017-10-05
US20210057269A1 (en) 2021-02-25
FR3049763A1 (enExample) 2017-10-06
TWI720161B (zh) 2021-03-01
FR3049763B1 (fr) 2018-03-16
CN109075120A (zh) 2018-12-21
CN109075120B (zh) 2023-04-07
US10886162B2 (en) 2021-01-05
DE112017001617T5 (de) 2018-12-20
JP2019514202A (ja) 2019-05-30
US20190115248A1 (en) 2019-04-18
US11626319B2 (en) 2023-04-11
KR20180127436A (ko) 2018-11-28
US20230238274A1 (en) 2023-07-27

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