JP6598811B2 - 半導体パッケージ配置装置、製造装置、半導体パッケージの配置方法および電子部品の製造方法 - Google Patents

半導体パッケージ配置装置、製造装置、半導体パッケージの配置方法および電子部品の製造方法 Download PDF

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JP6598811B2
JP6598811B2 JP2017057479A JP2017057479A JP6598811B2 JP 6598811 B2 JP6598811 B2 JP 6598811B2 JP 2017057479 A JP2017057479 A JP 2017057479A JP 2017057479 A JP2017057479 A JP 2017057479A JP 6598811 B2 JP6598811 B2 JP 6598811B2
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semiconductor package
support base
resin sheet
imaging
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JP2018160583A5 (https=
JP2018160583A (ja
Inventor
昌一 片岡
元樹 深井
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Towa Corp
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Towa Corp
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Priority to JP2017057479A priority Critical patent/JP6598811B2/ja
Priority to KR1020180024116A priority patent/KR102158028B1/ko
Priority to CN201810227519.1A priority patent/CN108630552B/zh
Priority to TW107109755A priority patent/TWI674640B/zh
Publication of JP2018160583A publication Critical patent/JP2018160583A/ja
Publication of JP2018160583A5 publication Critical patent/JP2018160583A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0604—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0428—Apparatus for mechanical treatment or grinding or cutting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/30—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations
    • H10P72/32—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations
    • H10P72/3212—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips or lead frames
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/02—Manufacture or treatment of conductive package substrates serving as an interconnection, e.g. of metal plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass

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  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Packaging Frangible Articles (AREA)
JP2017057479A 2017-03-23 2017-03-23 半導体パッケージ配置装置、製造装置、半導体パッケージの配置方法および電子部品の製造方法 Active JP6598811B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2017057479A JP6598811B2 (ja) 2017-03-23 2017-03-23 半導体パッケージ配置装置、製造装置、半導体パッケージの配置方法および電子部品の製造方法
KR1020180024116A KR102158028B1 (ko) 2017-03-23 2018-02-28 반도체 패키지 배치 장치, 제조 장치, 반도체 패키지의 배치 방법 및 전자 부품의 제조 방법
CN201810227519.1A CN108630552B (zh) 2017-03-23 2018-03-19 半导体封装体配置装置、制造装置、配置方法及其应用
TW107109755A TWI674640B (zh) 2017-03-23 2018-03-22 半導體封裝體配置裝置、製造裝置、半導體封裝體的配置方法以及電子零件的製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017057479A JP6598811B2 (ja) 2017-03-23 2017-03-23 半導体パッケージ配置装置、製造装置、半導体パッケージの配置方法および電子部品の製造方法

Publications (3)

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JP2018160583A JP2018160583A (ja) 2018-10-11
JP2018160583A5 JP2018160583A5 (https=) 2019-02-14
JP6598811B2 true JP6598811B2 (ja) 2019-10-30

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JP2017057479A Active JP6598811B2 (ja) 2017-03-23 2017-03-23 半導体パッケージ配置装置、製造装置、半導体パッケージの配置方法および電子部品の製造方法

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JP (1) JP6598811B2 (https=)
KR (1) KR102158028B1 (https=)
CN (1) CN108630552B (https=)
TW (1) TWI674640B (https=)

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2770817B2 (ja) * 1996-06-19 1998-07-02 日本電気株式会社 チップマウント装置及び方法
US6428641B1 (en) * 1998-08-31 2002-08-06 Amkor Technology, Inc. Method for laminating circuit pattern tape on semiconductor wafer
JP3986196B2 (ja) 1999-02-17 2007-10-03 株式会社ルネサステクノロジ 光半導体装置の製造方法
JP2003303854A (ja) * 2002-02-05 2003-10-24 Toray Eng Co Ltd チップ実装方法およびそれを用いた装置
JP2004335604A (ja) * 2003-05-02 2004-11-25 Seiko Epson Corp 半導体装置の製造方法および電子デバイスの製造方法
JP4538843B2 (ja) * 2004-03-05 2010-09-08 澁谷工業株式会社 ダイボンド用粘着テープの貼付方法
JP2006100762A (ja) * 2004-09-06 2006-04-13 Fuji Photo Film Co Ltd 固体撮像装置の製造方法
JP2009218397A (ja) * 2008-03-11 2009-09-24 Towa Corp 基板の切断方法及び装置
JP2010135574A (ja) * 2008-12-05 2010-06-17 Alpha- Design Kk 移載装置
JP2012013802A (ja) * 2010-06-29 2012-01-19 Hitachi High-Technologies Corp Ｆｐｄモジュールの位置決めマーク認識装置及びｆｐｄモジュールの組立装置
JP6149277B2 (ja) * 2011-03-30 2017-06-21 ボンドテック株式会社 電子部品実装方法、電子部品実装システムおよび基板
JP5836223B2 (ja) * 2011-12-02 2015-12-24 株式会社神戸製鋼所 貼合基板の回転ズレ量計測装置、貼合基板の回転ズレ量計測方法、及び貼合基板の製造方法
JP6017382B2 (ja) * 2013-07-29 2016-11-02 Ｔｏｗａ株式会社 個片化された電子部品の搬送装置及び搬送方法
JP6218511B2 (ja) * 2013-09-02 2017-10-25 Ｔｏｗａ株式会社 切断装置及び切断方法
JP6128337B2 (ja) * 2014-10-23 2017-05-17 パナソニックＩｐマネジメント株式会社 半導体装置の製造方法及び製造装置
JP6444717B2 (ja) * 2014-12-12 2018-12-26 Ｔｏｗａ株式会社 切断装置及び切断方法
KR101590593B1 (ko) * 2015-12-03 2016-02-02 제너셈(주) 반도체패키지의 스퍼터링 방법

Also Published As

Publication number Publication date
KR20180108434A (ko) 2018-10-04
CN108630552B (zh) 2021-08-03
JP2018160583A (ja) 2018-10-11
CN108630552A (zh) 2018-10-09
TWI674640B (zh) 2019-10-11
TW201901836A (zh) 2019-01-01
KR102158028B1 (ko) 2020-09-21

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