JP6593669B2 - 支持ガラス基板及びこれを用いた搬送体 - Google Patents

支持ガラス基板及びこれを用いた搬送体 Download PDF

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Publication number
JP6593669B2
JP6593669B2 JP2014176864A JP2014176864A JP6593669B2 JP 6593669 B2 JP6593669 B2 JP 6593669B2 JP 2014176864 A JP2014176864 A JP 2014176864A JP 2014176864 A JP2014176864 A JP 2014176864A JP 6593669 B2 JP6593669 B2 JP 6593669B2
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JP
Japan
Prior art keywords
glass substrate
substrate
supporting
less
supporting glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2014176864A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015078113A (ja
Inventor
光 池田
晋吉 三和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Electric Glass Co Ltd
Original Assignee
Nippon Electric Glass Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Glass Co Ltd filed Critical Nippon Electric Glass Co Ltd
Priority to JP2014176864A priority Critical patent/JP6593669B2/ja
Publication of JP2015078113A publication Critical patent/JP2015078113A/ja
Application granted granted Critical
Publication of JP6593669B2 publication Critical patent/JP6593669B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C3/00—Glass compositions
    • C03C3/04—Glass compositions containing silica
    • C03C3/076—Glass compositions containing silica with 40% to 90% silica, by weight
    • C03C3/089—Glass compositions containing silica with 40% to 90% silica, by weight containing boron
    • C03C3/091—Glass compositions containing silica with 40% to 90% silica, by weight containing boron containing aluminium
    • C03C3/093—Glass compositions containing silica with 40% to 90% silica, by weight containing boron containing aluminium containing zinc or zirconium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Organic Chemistry (AREA)
  • Glass Compositions (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Ceramic Engineering (AREA)
JP2014176864A 2013-09-12 2014-09-01 支持ガラス基板及びこれを用いた搬送体 Active JP6593669B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2014176864A JP6593669B2 (ja) 2013-09-12 2014-09-01 支持ガラス基板及びこれを用いた搬送体

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2013189065 2013-09-12
JP2013189065 2013-09-12
JP2014176864A JP6593669B2 (ja) 2013-09-12 2014-09-01 支持ガラス基板及びこれを用いた搬送体

Publications (2)

Publication Number Publication Date
JP2015078113A JP2015078113A (ja) 2015-04-23
JP6593669B2 true JP6593669B2 (ja) 2019-10-23

Family

ID=52665587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014176864A Active JP6593669B2 (ja) 2013-09-12 2014-09-01 支持ガラス基板及びこれを用いた搬送体

Country Status (5)

Country Link
JP (1) JP6593669B2 (fr)
KR (1) KR102200850B1 (fr)
CN (2) CN112159100A (fr)
TW (1) TWI644881B (fr)
WO (1) WO2015037478A1 (fr)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6119567B2 (ja) * 2013-11-11 2017-04-26 旭硝子株式会社 ガラス積層体の製造方法および電子デバイスの製造方法
WO2015156075A1 (fr) * 2014-04-07 2015-10-15 日本電気硝子株式会社 Substrat de support en verre et élément multicouche l'utilisant
JP6741214B2 (ja) * 2014-09-03 2020-08-19 日本電気硝子株式会社 支持ガラス基板及びこれを用いた積層体
JP6631935B2 (ja) * 2015-01-05 2020-01-15 日本電気硝子株式会社 ガラス板の製造方法
JP6742593B2 (ja) * 2015-01-05 2020-08-19 日本電気硝子株式会社 支持ガラス基板の製造方法及び積層体の製造方法
JP6663596B2 (ja) * 2015-03-10 2020-03-13 日本電気硝子株式会社 半導体用支持ガラス基板及びこれを用いた積層基板
KR102651767B1 (ko) 2015-05-28 2024-03-28 에이지씨 가부시키가이샤 유리 기판 및 적층 기판
TWI631688B (zh) * 2015-06-16 2018-08-01 勤友光電股份有限公司 用於雷射剝離處理之晶圓結構
CN113307471A (zh) * 2015-07-24 2021-08-27 Ａｇｃ株式会社 玻璃基板、捆包体以及玻璃基板的制造方法
CN117865460A (zh) * 2015-10-02 2024-04-12 Ａｇｃ株式会社 玻璃基板、层叠基板和层叠体
WO2017104514A1 (fr) * 2015-12-16 2017-06-22 日本電気硝子株式会社 Substrat de support en vitrocéramique, et stratifié mettant en œuvre celui-ci
CN108367961A (zh) * 2015-12-17 2018-08-03 日本电气硝子株式会社 支承玻璃基板的制造方法
CN108473362B (zh) 2015-12-28 2022-10-04 Ａｇｃ株式会社 玻璃基板、层叠基板、层叠体以及半导体封装的制造方法
JP6879308B2 (ja) 2016-09-16 2021-06-02 Ａｇｃ株式会社 ガラス基板、および積層基板
DE102018209589B4 (de) * 2017-06-22 2023-05-04 Schott Ag Verbund aus einem Bauteil, insbesondere einem elektronischen Bauteil, und einem Glas- oder Glaskeramikmaterial sowie Verfahren zu dessen Herstellung

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0230640A (ja) * 1988-07-19 1990-02-01 Nippon Electric Glass Co Ltd ファイバープレート用芯ガラス
JPH03237036A (ja) * 1989-08-24 1991-10-22 Nippon Electric Glass Co Ltd アルミナパッケージ用薄板状硼けい酸ガラス
JP5378158B2 (ja) * 2003-02-19 2013-12-25 日本電気硝子株式会社 半導体パッケージ用カバーガラス
JP4716245B2 (ja) * 2004-11-11 2011-07-06 日本電気硝子株式会社 ガラス基板及びその製造方法
JP5348598B2 (ja) * 2005-05-10 2013-11-20 日本電気硝子株式会社 半導体素子用ガラス基板およびそれを用いたチップスケールパッケージ
JP2007311492A (ja) * 2006-05-17 2007-11-29 Shinko Electric Ind Co Ltd 半導体装置の製造方法
US20080191334A1 (en) * 2007-02-12 2008-08-14 Visera Technologies Company Limited Glass dam structures for imaging devices chip scale package
JP2009016771A (ja) * 2007-06-08 2009-01-22 Ｈｏｙａ Ｃａｎｄｅｏ Ｏｐｔｒｏｎｉｃｓ株式会社 ウエハ支持ガラス
JP5334411B2 (ja) * 2007-12-30 2013-11-06 株式会社フジクラ 貼り合わせ基板および貼り合せ基板を用いた半導体装置の製造方法
JP5091696B2 (ja) * 2008-01-26 2012-12-05 株式会社フジクラ 半導体パッケージの製造方法
JP5483262B2 (ja) * 2009-12-04 2014-05-07 日本電気硝子株式会社 合わせガラス
JP5496692B2 (ja) * 2010-01-22 2014-05-21 三洋電機株式会社 半導体モジュールの製造方法
JP5573422B2 (ja) * 2010-06-29 2014-08-20 富士通株式会社 半導体装置の製造方法
JP2012105216A (ja) * 2010-11-12 2012-05-31 Sony Corp 表示制御回路及びプロジェクタ装置

Also Published As

Publication number Publication date
WO2015037478A1 (fr) 2015-03-19
CN112159100A (zh) 2021-01-01
KR102200850B1 (ko) 2021-01-11
CN105307993A (zh) 2016-02-03
JP2015078113A (ja) 2015-04-23
KR20160055104A (ko) 2016-05-17
TW201522269A (zh) 2015-06-16
TWI644881B (zh) 2018-12-21

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