JP6286292B2 - 不揮発性半導体記憶装置 - Google Patents

不揮発性半導体記憶装置 Download PDF

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Publication number
JP6286292B2
JP6286292B2 JP2014127706A JP2014127706A JP6286292B2 JP 6286292 B2 JP6286292 B2 JP 6286292B2 JP 2014127706 A JP2014127706 A JP 2014127706A JP 2014127706 A JP2014127706 A JP 2014127706A JP 6286292 B2 JP6286292 B2 JP 6286292B2
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Prior art keywords
movable charge
active region
movable
charge collection
memory device
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JP2014127706A
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JP2016009692A5 (enExample
JP2016009692A (ja
Inventor
谷口　泰弘
泰弘 谷口
泰彦 川嶋
泰彦 川嶋
秀男 葛西
秀男 葛西
裕 品川
裕 品川
櫻井　良多郎
良多郎 櫻井
奥山　幸祐
幸祐 奥山
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Floadia Corp
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Floadia Corp
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Priority to JP2014127706A priority Critical patent/JP6286292B2/ja
Priority to US15/319,875 priority patent/US10680001B2/en
Priority to PCT/JP2015/067412 priority patent/WO2015194582A1/ja
Priority to TW104119865A priority patent/TWI646662B/zh
Publication of JP2016009692A publication Critical patent/JP2016009692A/ja
Publication of JP2016009692A5 publication Critical patent/JP2016009692A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Layout of the interconnection structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/378—Contact regions to the substrate regions

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2014127706A 2014-06-20 2014-06-20 不揮発性半導体記憶装置 Active JP6286292B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2014127706A JP6286292B2 (ja) 2014-06-20 2014-06-20 不揮発性半導体記憶装置
US15/319,875 US10680001B2 (en) 2014-06-20 2015-06-17 Non-volatile semiconductor memory device
PCT/JP2015/067412 WO2015194582A1 (ja) 2014-06-20 2015-06-17 不揮発性半導体記憶装置
TW104119865A TWI646662B (zh) 2014-06-20 2015-06-18 Non-volatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014127706A JP6286292B2 (ja) 2014-06-20 2014-06-20 不揮発性半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2016009692A JP2016009692A (ja) 2016-01-18
JP2016009692A5 JP2016009692A5 (enExample) 2017-07-20
JP6286292B2 true JP6286292B2 (ja) 2018-02-28

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JP2014127706A Active JP6286292B2 (ja) 2014-06-20 2014-06-20 不揮発性半導体記憶装置

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Country Link
US (1) US10680001B2 (enExample)
JP (1) JP6286292B2 (enExample)
TW (1) TWI646662B (enExample)
WO (1) WO2015194582A1 (enExample)

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* Cited by examiner, † Cited by third party
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US9847133B2 (en) * 2016-01-19 2017-12-19 Ememory Technology Inc. Memory array capable of performing byte erase operation
DE112017004038T5 (de) * 2016-08-09 2019-05-02 Nidec Corporation Motor
KR20180120870A (ko) 2017-04-27 2018-11-07 삼성전자주식회사 반도체 소자
JP7462389B2 (ja) * 2019-07-18 2024-04-05 ローム株式会社 不揮発性半導体記憶装置
KR102864662B1 (ko) 2020-12-30 2025-09-25 에스케이하이닉스 주식회사 비휘발성 메모리 장치

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Also Published As

Publication number Publication date
TWI646662B (zh) 2019-01-01
US20170133391A1 (en) 2017-05-11
TW201611196A (zh) 2016-03-16
WO2015194582A1 (ja) 2015-12-23
JP2016009692A (ja) 2016-01-18
US10680001B2 (en) 2020-06-09

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