JP6107858B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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Description
図1は、本発明の実施の形態1にかかる製造途中の状態を工程順に示す断面図である。図2は、図1の製造工程をプロセスフローで示すフローチャートである。図1,2を用いて、実施の形態1にかかる半導体装置の製造方法について説明する。図1に示す実施の形態1にかかる半導体装置の製造方法により作製(製造)される半導体装置は、図1(h)に示すn型フィールドストップ(FS)層9を有するダイオード100である。まず、薄化されていない厚さの厚いn-型半導体基板20として、例えば、n型シリコン基板を準備する(図1(a))。
図8は、電子線照射ありおよび電子線照射なしにおけるキャリア濃度分布の相違を示す特性図である。図8(a)は、本発明の電子線照射あり(以下、実施例とする)と従来の電子線照射なし(以下、従来例1とする)とを比較した図である。図8(b)はいずれも電子線照射なしで、Rp2を0.5Rp1以上とした場合(以下、従来例2とする)と、Rp2を0.5Rp1よりも小さくした場合(従来例1)とを比較した図である。Rp1,Rp2は、プロトン注入の飛程であり、n-型半導体基板1の裏面1aからの平均飛程である。平均飛程とは、ガウス分布であらわされるn型FS層9の不純物濃度分布のピーク濃度位置の、基板裏面からの深さである。具体的には、平均飛程とは、基板裏面からプロトンピーク位置までの深さである。
図9は、実施の形態3にかかる半導体装置の製造工程をプロセスフローで示すフローチャートである。実施の形態3にかかる半導体装置の製造方法は、実施の形態1にかかる半導体装置の製造方法において、プロトン注入前後の工程順を変形した変形例である。実施の形態3にかかる半導体装置の製造方法が実施の形態1にかかる半導体装置の製造方法と異なる点は、n-型半導体基板の裏面研削後、プロトン注入前に、カソード層を形成するためのイオン注入と、レーザーアニールによるカソード層の活性化とを行う点である。実施の形態3にかかる半導体装置の製造方法のそれ以外の工程は、実施の形態1にかかる半導体装置の製造方法と同様である。
図10は、実施の形態4にかかる半導体装置の製造工程をプロセスフローで示すフローチャートである。実施の形態4にかかる半導体装置の製造方法が実施の形態3にかかる半導体装置の製造方法と異なる点は、レーザーアニールによるカソード層の活性化を、プロトン注入後に行うドナー生成のための熱処理とともに行う点である。すなわち、実施の形態4においては、カソード層を形成するためのイオン注入(図10(6))直後に、カソード層の活性化を目的とするレーザーアニールを行わずに、プロトン注入(図10(7))後の熱処理(図10(8))で、プロトンドナーの活性化と、カソード層の活性化とを同時に行う。実施の形態4にかかる半導体装置の製造方法のそれ以外の工程は、実施の形態3にかかる半導体装置の製造方法と同様である。
実施の形態1では、基板の深さ方向全体への点欠陥導入を電子線照射によって行っていた。一方、FZ基板のドーピング方法として、中性子線により核変換(Si→リン)を行うことで、低濃度で均一なドリフト層ドーピングをする方法が知られている。実施の形態5にかかる半導体装置の製造方法が実施の形態1にかかる半導体装置の製造方法と異なる点は、中性子線照射によって結晶欠陥42を発生させる点である。この中性子線照射によって生じた結晶欠陥42を、プロトンのドナー化を促進させるために用いる。
実施の形態2にかかる半導体装置の製造方法における複数回のプロトン照射における1段目のプロトンピーク位置の好ましい位置について、特に1段目の飛程Rp1が基板裏面から15μm以上深い位置であるのが好ましい理由を、以下、実施の形態6として説明する。
際に広がり抵抗(SR)測定法等によって得られた平均飛程Rp’(プロトンピーク位置
)との関係は、以下のように考えればよい。加速エネルギーの算出値Eに対して、実際の加速エネルギーE’がE±10%程度の範囲にあれば、実際の平均飛程Rp’も所望の平
均飛程Rpに対して±10%程度の範囲に収まり、測定誤差の範囲内となる。そのため、実際の平均飛程Rp’の所望の平均飛程Rpからのバラつきが、IGBTの電気的特性へ
与える影響は、無視できる程度に十分小さい。したがって、実際の加速エネルギーE’が
算出値E±5%の範囲にあれば、実際の平均飛程Rp’は実質的に設定どおりの平均飛程
Rpであると判断することができる。あるいは、実際の加速エネルギーE’を上記(3)
式に当てはめて算出した平均飛程Rpに対して、実際の平均飛程Rp’が±10%以内に
収まれば、問題ない。実際の加速器では、加速エネルギーEと平均飛程Rpはいずれも上記の範囲(±10%)に収まり得るので、実際の加速エネルギーE’および実際の平均飛
程Rp’は、所望の平均飛程Rpと算出値Eで表される上述のフィッティング式に従って
いると考えて、全く差支えない。さらに、ばらつきや誤差の範囲が、平均飛程Rpに対して±10%以下であればよく、好適には±5%に収まれば、申し分なく上記(3)式に従っていると考えることができる。
でプロトンを照射した試料を周知の広がり抵抗測定法(SR法)にて測定した実測値ともよく一致する。したがって、上記(3)式を用いることで、極めて精度よく、プロトンの飛程Rpに基づいて必要なプロトンの加速エネルギーEを予測することが可能となった。
図20は、本発明にかかる半導体装置の逆回復波形を示す特性図である。図20には、実施の形態1に従って作製された本発明の逆回復波形と、プロトン注入を行わずに電子線照射のみとした比較例の逆回復波形とを示す。定格電圧は1200Vとした。FZ法によるシリコン基板を用い、そのドーピング濃度(平均濃度)Nd、および、研削後の仕上がり厚さW0を図18に示す定格電圧1200Vのときの値とした。本発明のγ(1段目の飛程Rp1に対応)は1である。本発明の電子線照射条件は、線量を300kGyとし、加速エネルギーを5MeVとした。比較例の電子線照射条件は、線量を60kGyとした。本発明および比較例ともに、定格電流密度(図18の1200Vの欄)における順電圧降下を1.8Vとした。試験条件は、電源電圧VCCが800Vであり、初期の定常的なアノード電流は定格電流(電流密度×活性面積(約1cm2))である。チョッパー回路においてダイオード、駆動用IGBT(同じ1200V)、中間コンデンサとの浮遊インダクタンスは、200nHである。
図19は、実施の形態8にかかる半導体装置を示す説明図である。実施の形態8にかかる半導体装置は、実施の形態1にかかる半導体装置の構成をIGBTに適用した例である。図19(a)にはIGBTの断面構造を示し、図19(b)には図19(a)のA−A’線上のネットドーピング濃度分布を示す。実施の形態8にかかる半導体装置の製造方法
は、実施の形態1〜5にかかる半導体装置の製造方法においてダイオードの素子構造に代えてIGBTの素子構造を形成すればよい。
1a 薄いn-型半導体基板1の裏面
1b 薄いn-型半導体基板1のおもて面
2 p型アノード領域
3 n+型カソード層
4 耐圧接合終端構造
5 アノード電極
6 カソード電極
8 絶縁膜
9 n型フィールドストップ層
11 電子線照射
12 電子線照射11による結晶欠陥
13 プロトン注入
14 水素原子
15 プロトン注入13による結晶欠陥
18 ドナー層
20 厚いn-型半導体基板
20a 厚いn-型半導体基板20のおもて面
20b 厚いn-型半導体基板20の裏面
21 研削
100 ダイオード
Claims (12)
- 第1導電型のドリフト層が設けられた第1導電型の半導体基板と、
前記半導体基板の一方の主面側に設けられ、前記ドリフト層に隣接する第2導電型の第1半導体層と、
前記半導体基板の他方の主面側に設けられた第1導電型または第2導電型の第2半導体層と、
前記ドリフト層と前記第2半導体層との間に1つ以上設けられた、前記ドリフト層よりも高不純物濃度の第1導電型の高濃度層と、
前記ドリフト層を含む第1結晶欠陥領域と、
前記高濃度層を含み、前記第1結晶欠陥領域に隣接するように設けられた、前記第1結晶欠陥領域よりも、水素原子により終端されない点欠陥の濃度の少ない第2結晶欠陥領域と、
を備え、
前記ドリフト層に隣接する前記高濃度層の、前記半導体基板の他方の主面からの距離が15μm以上であり、
前記第2結晶欠陥領域は、空孔と酸素と水素との複合欠陥を主たる結晶欠陥とすることを特徴とする半導体装置。 - 前記高濃度層は水素誘起ドナーを有することを特徴とする請求項1に記載の半導体装置。
- 前記第1結晶欠陥領域のキャリアライフタイムは、深さ方向に一様であることを特徴とする請求項1または2に記載の半導体装置。
- 前記第2結晶欠陥領域のキャリアライフタイムは、前記第1結晶欠陥領域のキャリアライフタイムよりも長いことを特徴とする請求項1〜3のいずれか一つに記載の半導体装置。
- 前記第2結晶欠陥領域のキャリアライフタイムは、前記半導体基板の一方の主面側から他方の主面側に向かって増加することを特徴とする請求項1〜4のいずれか一つに記載の半導体装置。
- 前記第1結晶欠陥領域は空孔と複空孔とを主たる結晶欠陥とすることを特徴とする請求項1〜5のいずれか一つに記載の半導体装置。
- 前記第2結晶欠陥領域は、水素で終端されたダングリングボンドを有することを特徴とする請求項1〜6のいずれか一つに記載の半導体装置。
- 第1導電型の半導体基板に第1導電型のドリフト層を形成する工程と、
前記半導体基板の一方の主面側に、前記ドリフト層に隣接する第2導電型の第1半導体層を形成する工程と、
前記半導体基板の他方の主面側に、第1導電型または第2導電型の第2半導体層を形成する工程と、
前記ドリフト層と前記第2半導体層との間に、前記ドリフト層よりも高不純物濃度の第1導電型の高濃度層を1つ以上形成する工程と、
前記ドリフト層を含む第1結晶欠陥領域を形成する工程と、
前記高濃度層を含み、前記第1結晶欠陥領域に隣接するように、前記第1結晶欠陥領域よりも、水素原子により終端されない点欠陥の濃度の少ない第2結晶欠陥領域を形成する工程と、
を含み、
前記第1結晶欠陥領域を形成する工程は、前記第1結晶欠陥領域を電子線またはヘリウムの照射により形成し、
前記第2結晶欠陥領域を形成する工程は、前記第2結晶欠陥領域を電子線の照射またはヘリウムの照射、およびプロトン注入により形成し、
前記プロトン注入の加速エネルギーは、前記プロトン注入ごとに設定された所定の前記半導体基板中の平均飛程に基づいて算出された加速エネルギーで行うことを特徴とする半導体装置の製造方法。 - 前記プロトン注入の加速エネルギーEの常用対数値log(E)をyとし、前記プロトン注入の注入面からの平均飛程Rpの常用対数値log(Rp)をxとしたときに、y=−0.0047x 4 +0.0528x 3 −0.2211x 2 +0.9923x+5.0474を満たすことを特徴とする請求項9に記載の半導体装置の製造方法。
- 前記プロトン注入よりも前に、前記半導体基板の一方の主面を研削する工程をさらに含むことを特徴とする請求項9または10に記載の半導体装置の製造方法。
- 前記プロトン注入は、前記半導体基板の研削面側から行うことを特徴とする請求項11に記載の半導体装置の製造方法。
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