JP5912841B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5912841B2 JP5912841B2 JP2012113045A JP2012113045A JP5912841B2 JP 5912841 B2 JP5912841 B2 JP 5912841B2 JP 2012113045 A JP2012113045 A JP 2012113045A JP 2012113045 A JP2012113045 A JP 2012113045A JP 5912841 B2 JP5912841 B2 JP 5912841B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- transistor
- flip
- electrode
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
- G11C19/287—Organisation of a multiplicity of shift registers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
- H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2227—Standby or low power modes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Thin Film Transistor (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012113045A JP5912841B2 (ja) | 2011-05-20 | 2012-05-17 | 半導体装置 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011114084 | 2011-05-20 | ||
| JP2011114084 | 2011-05-20 | ||
| JP2012113045A JP5912841B2 (ja) | 2011-05-20 | 2012-05-17 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013009323A JP2013009323A (ja) | 2013-01-10 |
| JP2013009323A5 JP2013009323A5 (enExample) | 2015-04-30 |
| JP5912841B2 true JP5912841B2 (ja) | 2016-04-27 |
Family
ID=47174808
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012113045A Active JP5912841B2 (ja) | 2011-05-20 | 2012-05-17 | 半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US9336845B2 (enExample) |
| JP (1) | JP5912841B2 (enExample) |
| KR (1) | KR101960408B1 (enExample) |
| TW (1) | TWI570730B (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9467047B2 (en) * | 2011-05-31 | 2016-10-11 | Semiconductor Energy Laboratory Co., Ltd. | DC-DC converter, power source circuit, and semiconductor device |
| US9372694B2 (en) | 2012-03-29 | 2016-06-21 | Semiconductor Energy Laboratory Co., Ltd. | Reducing data backup and recovery periods in processors |
| US9291665B2 (en) * | 2012-05-14 | 2016-03-22 | Globalfoundries Inc. | Evaluating transistors with e-beam inspection |
| US9786350B2 (en) | 2013-03-18 | 2017-10-10 | Semiconductor Energy Laboratory Co., Ltd. | Memory device |
| JP6280794B2 (ja) * | 2013-04-12 | 2018-02-14 | 株式会社半導体エネルギー研究所 | 半導体装置及びその駆動方法 |
| JP6396671B2 (ja) | 2013-04-26 | 2018-09-26 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| KR102581808B1 (ko) | 2014-12-18 | 2023-09-21 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치, 센서 장치, 및 전자 기기 |
| KR102380798B1 (ko) * | 2017-09-04 | 2022-03-31 | 에스케이하이닉스 주식회사 | 레지스터를 포함하는 전자장치 |
Family Cites Families (169)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3378822A (en) * | 1963-03-12 | 1968-04-16 | Ncr Co | Magnetic thin film memory having bipolar digit currents |
| US3775693A (en) | 1971-11-29 | 1973-11-27 | Moskek Co | Mosfet logic inverter for integrated circuits |
| JPS55125016A (en) * | 1979-03-19 | 1980-09-26 | Tokyo Electric Power Co | Protecion controller matching system |
| JPS6025269A (ja) | 1983-07-21 | 1985-02-08 | Hitachi Ltd | 半導体記憶素子 |
| JPS60198861A (ja) | 1984-03-23 | 1985-10-08 | Fujitsu Ltd | 薄膜トランジスタ |
| JP2689416B2 (ja) | 1986-08-18 | 1997-12-10 | 日本電気株式会社 | フリツプフロツプ |
| JPH0244256B2 (ja) | 1987-01-28 | 1990-10-03 | Kagaku Gijutsucho Mukizaishitsu Kenkyushocho | Ingazn2o5deshimesarerurotsuhoshokeinosojokozoojusurukagobutsuoyobisonoseizoho |
| JPH0244260B2 (ja) | 1987-02-24 | 1990-10-03 | Kagaku Gijutsucho Mukizaishitsu Kenkyushocho | Ingazn5o8deshimesarerurotsuhoshokeinosojokozoojusurukagobutsuoyobisonoseizoho |
| JPH0244258B2 (ja) | 1987-02-24 | 1990-10-03 | Kagaku Gijutsucho Mukizaishitsu Kenkyushocho | Ingazn3o6deshimesarerurotsuhoshokeinosojokozoojusurukagobutsuoyobisonoseizoho |
| JPS63210023A (ja) | 1987-02-24 | 1988-08-31 | Natl Inst For Res In Inorg Mater | InGaZn↓4O↓7で示される六方晶系の層状構造を有する化合物およびその製造法 |
| JPH0244262B2 (ja) | 1987-02-27 | 1990-10-03 | Kagaku Gijutsucho Mukizaishitsu Kenkyushocho | Ingazn6o9deshimesarerurotsuhoshokeinosojokozoojusurukagobutsuoyobisonoseizoho |
| JPH0244263B2 (ja) | 1987-04-22 | 1990-10-03 | Kagaku Gijutsucho Mukizaishitsu Kenkyushocho | Ingazn7o10deshimesarerurotsuhoshokeinosojokozoojusurukagobutsuoyobisonoseizoho |
| US4800303A (en) | 1987-05-19 | 1989-01-24 | Gazelle Microcircuits, Inc. | TTL compatible output buffer |
| US4809225A (en) | 1987-07-02 | 1989-02-28 | Ramtron Corporation | Memory cell with volatile and non-volatile portions having ferroelectric capacitors |
| US5039883A (en) | 1990-02-21 | 1991-08-13 | Nec Electronics Inc. | Dual input universal logic structure |
| JPH05251705A (ja) | 1992-03-04 | 1993-09-28 | Fuji Xerox Co Ltd | 薄膜トランジスタ |
| JPH0784863A (ja) * | 1993-09-20 | 1995-03-31 | Hitachi Ltd | 情報処理装置およびそれに適した半導体記憶装置 |
| JPH07154228A (ja) | 1993-09-30 | 1995-06-16 | Nippon Telegr & Teleph Corp <Ntt> | 論理回路装置 |
| US5473571A (en) | 1993-09-30 | 1995-12-05 | Nippon Telegraph And Telephone Corporation | Data hold circuit |
| JP3672954B2 (ja) | 1994-12-26 | 2005-07-20 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| JP3479375B2 (ja) | 1995-03-27 | 2003-12-15 | 科学技術振興事業団 | 亜酸化銅等の金属酸化物半導体による薄膜トランジスタとpn接合を形成した金属酸化物半導体装置およびそれらの製造方法 |
| JPH098247A (ja) * | 1995-06-15 | 1997-01-10 | Hitachi Ltd | 半導体記憶装置 |
| EP0820644B1 (en) | 1995-08-03 | 2005-08-24 | Koninklijke Philips Electronics N.V. | Semiconductor device provided with transparent switching element |
| US6078194A (en) | 1995-11-13 | 2000-06-20 | Vitesse Semiconductor Corporation | Logic gates for reducing power consumption of gallium arsenide integrated circuits |
| JP3625598B2 (ja) | 1995-12-30 | 2005-03-02 | 三星電子株式会社 | 液晶表示装置の製造方法 |
| JPH1078836A (ja) | 1996-09-05 | 1998-03-24 | Hitachi Ltd | データ処理装置 |
| JP4103968B2 (ja) | 1996-09-18 | 2008-06-18 | 株式会社半導体エネルギー研究所 | 絶縁ゲイト型半導体装置 |
| US5980092A (en) | 1996-11-19 | 1999-11-09 | Unisys Corporation | Method and apparatus for optimizing a gated clock structure using a standard optimization tool |
| US6049883A (en) | 1998-04-01 | 2000-04-11 | Tjandrasuwita; Ignatius B. | Data path clock skew management in a dynamic power management environment |
| JP4170454B2 (ja) | 1998-07-24 | 2008-10-22 | Hoya株式会社 | 透明導電性酸化物薄膜を有する物品及びその製造方法 |
| JP2000077982A (ja) | 1998-08-27 | 2000-03-14 | Kobe Steel Ltd | 半導体集積回路 |
| JP2000150861A (ja) | 1998-11-16 | 2000-05-30 | Tdk Corp | 酸化物薄膜 |
| JP3276930B2 (ja) | 1998-11-17 | 2002-04-22 | 科学技術振興事業団 | トランジスタ及び半導体装置 |
| JP3955409B2 (ja) | 1999-03-17 | 2007-08-08 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US6204695B1 (en) | 1999-06-18 | 2001-03-20 | Xilinx, Inc. | Clock-gating circuit for reducing power consumption |
| TW460731B (en) | 1999-09-03 | 2001-10-21 | Ind Tech Res Inst | Electrode structure and production method of wide viewing angle LCD |
| US6281710B1 (en) | 1999-12-17 | 2001-08-28 | Hewlett-Packard Company | Selective latch for a domino logic gate |
| JP4089858B2 (ja) | 2000-09-01 | 2008-05-28 | 国立大学法人東北大学 | 半導体デバイス |
| JP3727838B2 (ja) | 2000-09-27 | 2005-12-21 | 株式会社東芝 | 半導体集積回路 |
| US6570801B2 (en) | 2000-10-27 | 2003-05-27 | Kabushiki Kaisha Toshiba | Semiconductor memory having refresh function |
| KR20020038482A (ko) | 2000-11-15 | 2002-05-23 | 모리시타 요이찌 | 박막 트랜지스터 어레이, 그 제조방법 및 그것을 이용한표시패널 |
| JP3997731B2 (ja) | 2001-03-19 | 2007-10-24 | 富士ゼロックス株式会社 | 基材上に結晶性半導体薄膜を形成する方法 |
| JP2002289859A (ja) | 2001-03-23 | 2002-10-04 | Minolta Co Ltd | 薄膜トランジスタ |
| DE10119051B4 (de) | 2001-04-18 | 2006-12-28 | Infineon Technologies Ag | Schaltungsanordnung zur Freigabe eines Taktsignals in Abhängigkeit von einem Freigabesignal |
| JP4090716B2 (ja) | 2001-09-10 | 2008-05-28 | 雅司 川崎 | 薄膜トランジスタおよびマトリクス表示装置 |
| JP3925839B2 (ja) | 2001-09-10 | 2007-06-06 | シャープ株式会社 | 半導体記憶装置およびその試験方法 |
| WO2003040441A1 (fr) | 2001-11-05 | 2003-05-15 | Japan Science And Technology Agency | Film mince monocristallin homologue a super-reseau naturel, procede de preparation et dispositif dans lequel est utilise ledit film mince monocristallin |
| JP4164562B2 (ja) | 2002-09-11 | 2008-10-15 | 独立行政法人科学技術振興機構 | ホモロガス薄膜を活性層として用いる透明薄膜電界効果型トランジスタ |
| WO2003044953A1 (en) | 2001-11-19 | 2003-05-30 | Rohm Co., Ltd. | Data holding apparatus and data read out method |
| JP2003157682A (ja) * | 2001-11-26 | 2003-05-30 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
| JP4091301B2 (ja) | 2001-12-28 | 2008-05-28 | 富士通株式会社 | 半導体集積回路および半導体メモリ |
| JP4083486B2 (ja) | 2002-02-21 | 2008-04-30 | 独立行政法人科学技術振興機構 | LnCuO(S,Se,Te)単結晶薄膜の製造方法 |
| CN1445821A (zh) | 2002-03-15 | 2003-10-01 | 三洋电机株式会社 | ZnO膜和ZnO半导体层的形成方法、半导体元件及其制造方法 |
| JP3933591B2 (ja) | 2002-03-26 | 2007-06-20 | 淳二 城戸 | 有機エレクトロルミネッセント素子 |
| JP3940014B2 (ja) | 2002-03-29 | 2007-07-04 | 富士通株式会社 | 半導体集積回路、無線タグ、および非接触型icカード |
| CN100337333C (zh) * | 2002-04-10 | 2007-09-12 | 松下电器产业株式会社 | 非易失性触发器 |
| US7339187B2 (en) | 2002-05-21 | 2008-03-04 | State Of Oregon Acting By And Through The Oregon State Board Of Higher Education On Behalf Of Oregon State University | Transistor structures |
| JP2004022625A (ja) | 2002-06-13 | 2004-01-22 | Murata Mfg Co Ltd | 半導体デバイス及び該半導体デバイスの製造方法 |
| ATE421098T1 (de) | 2002-06-21 | 2009-01-15 | Koninkl Philips Electronics Nv | Schaltung mit asynchron arbeitenden komponenten |
| US7105868B2 (en) | 2002-06-24 | 2006-09-12 | Cermet, Inc. | High-electron mobility transistor with zinc oxide |
| US7067843B2 (en) | 2002-10-11 | 2006-06-27 | E. I. Du Pont De Nemours And Company | Transparent oxide semiconductor thin film transistors |
| US6788567B2 (en) | 2002-12-02 | 2004-09-07 | Rohm Co., Ltd. | Data holding device and data holding method |
| CN1322672C (zh) | 2002-12-25 | 2007-06-20 | 松下电器产业株式会社 | 非易失性闩锁电路及其驱动方法 |
| JP4166105B2 (ja) | 2003-03-06 | 2008-10-15 | シャープ株式会社 | 半導体装置およびその製造方法 |
| JP2004273732A (ja) | 2003-03-07 | 2004-09-30 | Sharp Corp | アクティブマトリクス基板およびその製造方法 |
| JP4108633B2 (ja) | 2003-06-20 | 2008-06-25 | シャープ株式会社 | 薄膜トランジスタおよびその製造方法ならびに電子デバイス |
| US7262463B2 (en) | 2003-07-25 | 2007-08-28 | Hewlett-Packard Development Company, L.P. | Transistor including a deposited channel region having a doped portion |
| US7076748B2 (en) | 2003-08-01 | 2006-07-11 | Atrenta Inc. | Identification and implementation of clock gating in the design of integrated circuits |
| KR100520585B1 (ko) * | 2003-10-28 | 2005-10-10 | 주식회사 하이닉스반도체 | 불휘발성 강유전체 메모리 셀 및 이를 이용한 메모리 장치 |
| US7064973B2 (en) | 2004-02-03 | 2006-06-20 | Klp International, Ltd. | Combination field programmable gate array allowing dynamic reprogrammability |
| US6972986B2 (en) | 2004-02-03 | 2005-12-06 | Kilopass Technologies, Inc. | Combination field programmable gate array allowing dynamic reprogrammability and non-votatile programmability based upon transistor gate oxide breakdown |
| CN1998087B (zh) | 2004-03-12 | 2014-12-31 | 独立行政法人科学技术振兴机构 | 非晶形氧化物和薄膜晶体管 |
| US7145174B2 (en) | 2004-03-12 | 2006-12-05 | Hewlett-Packard Development Company, Lp. | Semiconductor device |
| US7282782B2 (en) | 2004-03-12 | 2007-10-16 | Hewlett-Packard Development Company, L.P. | Combined binary oxide semiconductor device |
| US7297977B2 (en) | 2004-03-12 | 2007-11-20 | Hewlett-Packard Development Company, L.P. | Semiconductor device |
| US7211825B2 (en) | 2004-06-14 | 2007-05-01 | Yi-Chi Shih | Indium oxide-based thin film transistors and circuits |
| JP2006100760A (ja) | 2004-09-02 | 2006-04-13 | Casio Comput Co Ltd | 薄膜トランジスタおよびその製造方法 |
| US20060095975A1 (en) | 2004-09-03 | 2006-05-04 | Takayoshi Yamada | Semiconductor device |
| US7285501B2 (en) | 2004-09-17 | 2007-10-23 | Hewlett-Packard Development Company, L.P. | Method of forming a solution processed device |
| US7374984B2 (en) | 2004-10-29 | 2008-05-20 | Randy Hoffman | Method of forming a thin film component |
| US7298084B2 (en) | 2004-11-02 | 2007-11-20 | 3M Innovative Properties Company | Methods and displays utilizing integrated zinc oxide row and column drivers in conjunction with organic light emitting diodes |
| KR20070085879A (ko) | 2004-11-10 | 2007-08-27 | 캐논 가부시끼가이샤 | 발광 장치 |
| US7791072B2 (en) | 2004-11-10 | 2010-09-07 | Canon Kabushiki Kaisha | Display |
| US7863611B2 (en) | 2004-11-10 | 2011-01-04 | Canon Kabushiki Kaisha | Integrated circuits utilizing amorphous oxides |
| US7829444B2 (en) | 2004-11-10 | 2010-11-09 | Canon Kabushiki Kaisha | Field effect transistor manufacturing method |
| CA2585190A1 (en) | 2004-11-10 | 2006-05-18 | Canon Kabushiki Kaisha | Amorphous oxide and field effect transistor |
| US7453065B2 (en) | 2004-11-10 | 2008-11-18 | Canon Kabushiki Kaisha | Sensor and image pickup device |
| US7868326B2 (en) | 2004-11-10 | 2011-01-11 | Canon Kabushiki Kaisha | Field effect transistor |
| US7256622B2 (en) | 2004-12-08 | 2007-08-14 | Naveen Dronavalli | AND, OR, NAND, and NOR logical gates |
| US7579224B2 (en) | 2005-01-21 | 2009-08-25 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a thin film semiconductor device |
| TWI569441B (zh) | 2005-01-28 | 2017-02-01 | 半導體能源研究所股份有限公司 | 半導體裝置,電子裝置,和半導體裝置的製造方法 |
| TWI472037B (zh) | 2005-01-28 | 2015-02-01 | 半導體能源研究所股份有限公司 | 半導體裝置,電子裝置,和半導體裝置的製造方法 |
| US7858451B2 (en) | 2005-02-03 | 2010-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Electronic device, semiconductor device and manufacturing method thereof |
| US7948171B2 (en) | 2005-02-18 | 2011-05-24 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device |
| US20060197092A1 (en) | 2005-03-03 | 2006-09-07 | Randy Hoffman | System and method for forming conductive material on a substrate |
| US8681077B2 (en) | 2005-03-18 | 2014-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and display device, driving method and electronic apparatus thereof |
| US7544967B2 (en) | 2005-03-28 | 2009-06-09 | Massachusetts Institute Of Technology | Low voltage flexible organic/transparent transistor for selective gas sensing, photodetecting and CMOS device applications |
| US7645478B2 (en) | 2005-03-31 | 2010-01-12 | 3M Innovative Properties Company | Methods of making displays |
| US8300031B2 (en) | 2005-04-20 | 2012-10-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising transistor having gate and drain connected through a current-voltage conversion element |
| JP2006344849A (ja) | 2005-06-10 | 2006-12-21 | Casio Comput Co Ltd | 薄膜トランジスタ |
| US7691666B2 (en) | 2005-06-16 | 2010-04-06 | Eastman Kodak Company | Methods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby |
| US7402506B2 (en) | 2005-06-16 | 2008-07-22 | Eastman Kodak Company | Methods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby |
| US7507618B2 (en) | 2005-06-27 | 2009-03-24 | 3M Innovative Properties Company | Method for making electronic devices using metal oxide nanoparticles |
| KR100711890B1 (ko) | 2005-07-28 | 2007-04-25 | 삼성에스디아이 주식회사 | 유기 발광표시장치 및 그의 제조방법 |
| US7323909B2 (en) | 2005-07-29 | 2008-01-29 | Sequence Design, Inc. | Automatic extension of clock gating technique to fine-grained power gating |
| JP2007059128A (ja) | 2005-08-23 | 2007-03-08 | Canon Inc | 有機el表示装置およびその製造方法 |
| JP2007073705A (ja) | 2005-09-06 | 2007-03-22 | Canon Inc | 酸化物半導体チャネル薄膜トランジスタおよびその製造方法 |
| JP4280736B2 (ja) | 2005-09-06 | 2009-06-17 | キヤノン株式会社 | 半導体素子 |
| JP5116225B2 (ja) | 2005-09-06 | 2013-01-09 | キヤノン株式会社 | 酸化物半導体デバイスの製造方法 |
| JP4850457B2 (ja) | 2005-09-06 | 2012-01-11 | キヤノン株式会社 | 薄膜トランジスタ及び薄膜ダイオード |
| EP1998373A3 (en) | 2005-09-29 | 2012-10-31 | Semiconductor Energy Laboratory Co, Ltd. | Semiconductor device having oxide semiconductor layer and manufacturing method thereof |
| JP5037808B2 (ja) | 2005-10-20 | 2012-10-03 | キヤノン株式会社 | アモルファス酸化物を用いた電界効果型トランジスタ、及び該トランジスタを用いた表示装置 |
| WO2007058329A1 (en) | 2005-11-15 | 2007-05-24 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| TWI292281B (en) | 2005-12-29 | 2008-01-01 | Ind Tech Res Inst | Pixel structure of active organic light emitting diode and method of fabricating the same |
| US7867636B2 (en) | 2006-01-11 | 2011-01-11 | Murata Manufacturing Co., Ltd. | Transparent conductive film and method for manufacturing the same |
| JP4977478B2 (ja) | 2006-01-21 | 2012-07-18 | 三星電子株式会社 | ZnOフィルム及びこれを用いたTFTの製造方法 |
| US7576394B2 (en) | 2006-02-02 | 2009-08-18 | Kochi Industrial Promotion Center | Thin film transistor including low resistance conductive thin films and manufacturing method thereof |
| US7977169B2 (en) | 2006-02-15 | 2011-07-12 | Kochi Industrial Promotion Center | Semiconductor device including active layer made of zinc oxide with controlled orientations and manufacturing method thereof |
| KR20070101595A (ko) | 2006-04-11 | 2007-10-17 | 삼성전자주식회사 | ZnO TFT |
| US20070252928A1 (en) | 2006-04-28 | 2007-11-01 | Toppan Printing Co., Ltd. | Structure, transmission type liquid crystal display, reflection type display and manufacturing method thereof |
| JP2007305027A (ja) | 2006-05-15 | 2007-11-22 | Toshiba Corp | 汎用レジスタ回路 |
| JP5028033B2 (ja) | 2006-06-13 | 2012-09-19 | キヤノン株式会社 | 酸化物半導体膜のドライエッチング方法 |
| JP4999400B2 (ja) | 2006-08-09 | 2012-08-15 | キヤノン株式会社 | 酸化物半導体膜のドライエッチング方法 |
| JP4609797B2 (ja) | 2006-08-09 | 2011-01-12 | Nec液晶テクノロジー株式会社 | 薄膜デバイス及びその製造方法 |
| JP4954639B2 (ja) | 2006-08-25 | 2012-06-20 | パナソニック株式会社 | ラッチ回路及びこれを備えた半導体集積回路 |
| JP4332545B2 (ja) | 2006-09-15 | 2009-09-16 | キヤノン株式会社 | 電界効果型トランジスタ及びその製造方法 |
| JP4274219B2 (ja) | 2006-09-27 | 2009-06-03 | セイコーエプソン株式会社 | 電子デバイス、有機エレクトロルミネッセンス装置、有機薄膜半導体装置 |
| JP5164357B2 (ja) | 2006-09-27 | 2013-03-21 | キヤノン株式会社 | 半導体装置及び半導体装置の製造方法 |
| US7622371B2 (en) | 2006-10-10 | 2009-11-24 | Hewlett-Packard Development Company, L.P. | Fused nanocrystal thin film semiconductor and method |
| US7772021B2 (en) | 2006-11-29 | 2010-08-10 | Samsung Electronics Co., Ltd. | Flat panel displays comprising a thin-film transistor having a semiconductive oxide in its channel and methods of fabricating the same for use in flat panel displays |
| JP2008140684A (ja) | 2006-12-04 | 2008-06-19 | Toppan Printing Co Ltd | カラーelディスプレイおよびその製造方法 |
| US7576582B2 (en) | 2006-12-05 | 2009-08-18 | Electronics And Telecommunications Research Institute | Low-power clock gating circuit |
| JP4297159B2 (ja) | 2006-12-08 | 2009-07-15 | ソニー株式会社 | フリップフロップおよび半導体集積回路 |
| KR101303578B1 (ko) | 2007-01-05 | 2013-09-09 | 삼성전자주식회사 | 박막 식각 방법 |
| US8207063B2 (en) | 2007-01-26 | 2012-06-26 | Eastman Kodak Company | Process for atomic layer deposition |
| KR100851215B1 (ko) | 2007-03-14 | 2008-08-07 | 삼성에스디아이 주식회사 | 박막 트랜지스터 및 이를 이용한 유기 전계 발광표시장치 |
| US7795613B2 (en) | 2007-04-17 | 2010-09-14 | Toppan Printing Co., Ltd. | Structure with transistor |
| KR101325053B1 (ko) | 2007-04-18 | 2013-11-05 | 삼성디스플레이 주식회사 | 박막 트랜지스터 기판 및 이의 제조 방법 |
| KR20080094300A (ko) | 2007-04-19 | 2008-10-23 | 삼성전자주식회사 | 박막 트랜지스터 및 그 제조 방법과 박막 트랜지스터를포함하는 평판 디스플레이 |
| KR101334181B1 (ko) | 2007-04-20 | 2013-11-28 | 삼성전자주식회사 | 선택적으로 결정화된 채널층을 갖는 박막 트랜지스터 및 그제조 방법 |
| CN101663762B (zh) | 2007-04-25 | 2011-09-21 | 佳能株式会社 | 氧氮化物半导体 |
| KR101345376B1 (ko) | 2007-05-29 | 2013-12-24 | 삼성전자주식회사 | ZnO 계 박막 트랜지스터 및 그 제조방법 |
| US20090002044A1 (en) | 2007-06-29 | 2009-01-01 | Seiko Epson Corporation | Master-slave type flip-flop circuit |
| JP5215158B2 (ja) | 2007-12-17 | 2013-06-19 | 富士フイルム株式会社 | 無機結晶性配向膜及びその製造方法、半導体デバイス |
| US8145923B2 (en) | 2008-02-20 | 2012-03-27 | Xilinx, Inc. | Circuit for and method of minimizing power consumption in an integrated circuit device |
| JP5140459B2 (ja) | 2008-02-28 | 2013-02-06 | ローム株式会社 | 不揮発性記憶ゲートおよびその動作方法、および不揮発性記憶ゲート組込み型論理回路およびその動作方法 |
| JP2010034710A (ja) | 2008-07-25 | 2010-02-12 | Nec Electronics Corp | 半導体集積回路及びその誤動作防止方法 |
| JP4623179B2 (ja) | 2008-09-18 | 2011-02-02 | ソニー株式会社 | 薄膜トランジスタおよびその製造方法 |
| JP5451280B2 (ja) | 2008-10-09 | 2014-03-26 | キヤノン株式会社 | ウルツ鉱型結晶成長用基板およびその製造方法ならびに半導体装置 |
| US7961502B2 (en) * | 2008-12-04 | 2011-06-14 | Qualcomm Incorporated | Non-volatile state retention latch |
| JP5781720B2 (ja) | 2008-12-15 | 2015-09-24 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
| KR101711236B1 (ko) | 2009-10-09 | 2017-02-28 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| IN2012DN01823A (enExample) | 2009-10-16 | 2015-06-05 | Semiconductor Energy Lab | |
| KR20220153647A (ko) * | 2009-10-29 | 2022-11-18 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| KR101669476B1 (ko) | 2009-10-30 | 2016-10-26 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 논리 회로 및 반도체 장치 |
| WO2011062075A1 (en) | 2009-11-20 | 2011-05-26 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile latch circuit and logic circuit, and semiconductor device using the same |
| IN2012DN04871A (enExample) | 2009-12-11 | 2015-09-25 | Semiconductor Energy Laoboratory Co Ltd | |
| KR101729933B1 (ko) | 2009-12-18 | 2017-04-25 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 불휘발성 래치 회로와 논리 회로, 및 이를 사용한 반도체 장치 |
| CN102804603B (zh) | 2010-01-20 | 2015-07-15 | 株式会社半导体能源研究所 | 信号处理电路及其驱动方法 |
| TWI555128B (zh) | 2010-08-06 | 2016-10-21 | 半導體能源研究所股份有限公司 | 半導體裝置及半導體裝置的驅動方法 |
| JP2010282721A (ja) | 2010-08-09 | 2010-12-16 | Renesas Electronics Corp | 半導体装置 |
| JP5727892B2 (ja) | 2010-08-26 | 2015-06-03 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP5839474B2 (ja) | 2011-03-24 | 2016-01-06 | 株式会社半導体エネルギー研究所 | 信号処理回路 |
| JP5879165B2 (ja) | 2011-03-30 | 2016-03-08 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP5883699B2 (ja) | 2011-04-13 | 2016-03-15 | 株式会社半導体エネルギー研究所 | プログラマブルlsi |
| US8854867B2 (en) | 2011-04-13 | 2014-10-07 | Semiconductor Energy Laboratory Co., Ltd. | Memory device and driving method of the memory device |
| JP6001900B2 (ja) | 2011-04-21 | 2016-10-05 | 株式会社半導体エネルギー研究所 | 信号処理回路 |
| SG10201605470SA (en) | 2012-01-23 | 2016-08-30 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| JP2014063557A (ja) | 2012-02-24 | 2014-04-10 | Semiconductor Energy Lab Co Ltd | 記憶装置及び半導体装置 |
-
2012
- 2012-05-09 US US13/467,403 patent/US9336845B2/en active Active
- 2012-05-09 TW TW101116522A patent/TWI570730B/zh not_active IP Right Cessation
- 2012-05-17 JP JP2012113045A patent/JP5912841B2/ja active Active
- 2012-05-18 KR KR1020120053321A patent/KR101960408B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US9336845B2 (en) | 2016-05-10 |
| KR20120129833A (ko) | 2012-11-28 |
| US20120294060A1 (en) | 2012-11-22 |
| TWI570730B (zh) | 2017-02-11 |
| TW201308338A (zh) | 2013-02-16 |
| KR101960408B1 (ko) | 2019-03-20 |
| JP2013009323A (ja) | 2013-01-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6203300B2 (ja) | 半導体装置 | |
| JP5743790B2 (ja) | 半導体装置 | |
| JP6194148B2 (ja) | 半導体装置及び半導体装置の作製方法 | |
| JP5912841B2 (ja) | 半導体装置 | |
| JP5745363B2 (ja) | 半導体装置 | |
| JP5875412B2 (ja) | 半導体装置 | |
| JP5809078B2 (ja) | 記憶装置 | |
| JP5871388B2 (ja) | プログラマブルロジックデバイス | |
| JP5881524B2 (ja) | 記憶回路、電子機器 | |
| JP5781865B2 (ja) | 半導体装置 | |
| JP6014362B2 (ja) | 半導体装置の作製方法 | |
| JP5937412B2 (ja) | 記憶回路及び信号処理回路 | |
| JP5955636B2 (ja) | 半導体記憶装置 | |
| JP6243959B2 (ja) | 半導体装置 | |
| JP5844687B2 (ja) | 半導体装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150313 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20150313 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20151222 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160126 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160204 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160308 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160401 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5912841 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |