JP5758344B2 - 能動集積回路上のボンディングのためのシステム及び方法 - Google Patents
能動集積回路上のボンディングのためのシステム及び方法 Download PDFInfo
- Publication number
- JP5758344B2 JP5758344B2 JP2012106483A JP2012106483A JP5758344B2 JP 5758344 B2 JP5758344 B2 JP 5758344B2 JP 2012106483 A JP2012106483 A JP 2012106483A JP 2012106483 A JP2012106483 A JP 2012106483A JP 5758344 B2 JP5758344 B2 JP 5758344B2
- Authority
- JP
- Japan
- Prior art keywords
- bond pad
- dielectric layer
- integrated circuit
- metal
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05073—Single internal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05085—Plural internal layers being stacked with additional elements, e.g. vias arrays, interposed between the stacked layers
- H01L2224/05089—Disposition of the additional element
- H01L2224/05093—Disposition of the additional element of a plurality of vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05085—Plural internal layers being stacked with additional elements, e.g. vias arrays, interposed between the stacked layers
- H01L2224/05089—Disposition of the additional element
- H01L2224/05093—Disposition of the additional element of a plurality of vias
- H01L2224/05096—Uniform arrangement, i.e. array
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05181—Tantalum [Ta] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/05186—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2224/05187—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
- H01L2224/05546—Dual damascene structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05567—Disposition the external layer being at least partially embedded in the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48617—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
- H01L2224/48624—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48647—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
- H01L2224/487—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48717—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
- H01L2224/48724—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
- H01L2224/487—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48738—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48747—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
- H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48817—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
- H01L2224/48824—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
- H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48847—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01025—Manganese [Mn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01073—Tantalum [Ta]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01076—Osmium [Os]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0494—4th Group
- H01L2924/04941—TiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0495—5th Group
- H01L2924/04953—TaN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0496—6th Group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30105—Capacitance
Description
1.ボンドパッドと、該ボンドパッドの下に配置される集積回路の少なくとも1つの部分と、を含み、前記部分が少なくとも1つの誘電層と該誘電層に配置されるパターン形成された電導性強化構造とを含むことを特徴とする集積回路。
2.前記部分が前記ボンドパッドの下に実領域を占有する請求項1に記載の集積回路。
3.前記部分が機械的に弱い誘電層を含む請求項1に記載の集積回路。
4.前記部分が少なくとも1つの多層誘電性スタックを含む請求項1に記載の集積回路。
5.前記部分が機械的に弱い有機層を含む請求項1に記載の集積回路。
6.前記部分が抵抗(レジスタ)、インダクタ、またはコンデンサとして構成される少なくとも1つの電導性構造を含む請求項1に記載の集積回路。
7.前記部分が金属製のパターン形成された電導性強化構造を含む請求項1に記載の集積回路。
8.前記部分が相互接続として構成された少なくとも1つの電導性構造を含む請求項1に記載の集積回路。
9.前記部分が少なくとも1つのバイアによって前記ボンドパッドに接続されている請求項1に記載の集積回路。
10.ボンドパッドと、該ボンドパッドの1つの部分の下に配置される前記集積回路の少なくとも1つの部分と、少なくとも1つの第1誘電層と該第1誘電層に配置される第1の電導性強化回路構造とを含む前記部分と、前記ボンドパッドの一部分の下に配置される少なくとも1つの第2誘電層と、該第2誘電層に配置される第2強化構造と、を含むことを特徴とする集積回路。
11.前記ボンドパッドの前記部分が部分的に同一である請求項10に記載の集積回路。
12.前記ボンドパッドの前記部分が完全に同一である請求項10に記載の集積回路。
13.前記ボンドパッドの前記部分が完全に異なる請求項10に記載の集積回路。
14.前記強化構造が前記ボンドパッドの下に実領域を占有する請求項10に記載の集積回路。
15.前記第2強化構造が電導性材料を含む請求項10に記載の集積回路。
16.前記電導性材料が金属である請求項15に記載の集積回路。
17.前記第2誘電層が機械的に弱い誘電層を含む請求項10に記載の集積回路。
18.前記第2誘電層が少なくとも1つの多層誘電性スタックである請求項10に記載の集積回路。
19.前記第2誘電層が機械的に弱い有機層を含む請求項10に記載の集積回路。
20.前記第1及び第2誘電層が同一の材料製である請求項10に記載の集積回路。
21.前記第1及び第2誘電層が異なる材料製である請求項10に記載の集積回路。
22.前記第2のパターン形成された強化構造が複数の接続された構造要素を含む請求項10に記載の集積回路。
23.前記第2のパターン形成された強化構造が複数の繰り返し構造要素を含む請求項10に記載の集積回路。
24.前記第2のパターン形成された強化構造が複数の非連結の繰り返し構造要素を含む請求項10に記載の集積回路。
25.前記少なくとも1つの回路部分が少なくとも1つのバイアにより前記第2のパターン形成された強化構造に接続されている請求項10に記載の集積回路。
26.前記第1及び第2誘電層が同一である請求項10に記載の集積回路。
27.ボンドパッドと、該ボンドパッドの1つの部分の下に配置される前記集積回路の第1部分と、少なくとも1つの第1誘電層と該少なくとも1つの第1誘電層に配置される第1の電導性強化回路構造とを含む前記第1回路部分と、前記ボンドパッドの一部分の下に配置される前記集積回路の少なくとも1つの追加部分と、少なくとも1つの第2誘電層と該少なくとも1つの第2誘電層に配置される第2の電導性強化回路構造とを含む前記少なくとも1つの追加部分と、を含むことを特徴とする集積回路。
28.前記ボンドパッドの前記部分が部分的に同一である請求項27に記載の集積回路。
29.前記ボンドパッドの前記部分が完全に同一である請求項27に記載の集積回路。
30.前記ボンドの前記部分が完全に異なる請求項27に記載の集積回路。
31.前記第1回路部分が少なくとも1つのバイアにより前記少なくとも1つの追加回路部分に接続されている請求項27に記載の集積回路。
33.前記電導性強化構造が金属を含む請求項32に記載の方法。
34.前記少なくとも1つの誘電層と前記強化構造を供給する前記プロセスが、強化層を形成する段階と、所定領域の前記強化層を複数の空領域を有する回路パターンの一部分にパターン形成する段階と、パターン形成した強化層の上に誘電層を形成し、そこに空領域を充填する段階と、パターン形成された強化層の上の誘電層にボンドパッドを形成する段階と、を含む請求項32に記載の方法。
35.そのボンドパッドを形成する前に少なくとも一度、強化層形成、パターン形成、及び誘電層形成段階を繰り返すプロセスを更に含む請求項34に記載の方法。
36.前記少なくとも1つの誘電層と前記強化構造を供給する前記プロセスが、第1誘電層を形成する段階と、所定領域の前記第1誘電層を複数の空領域を有する回路パターンの一部分にパターン形成する段階と、前記パターン形成された第1誘電層の上に強化材料層を形成し、そこに前記空領域を充填する段階と、前記充填した空領域以外の前記強化材料を除去し、一様に平坦な面が形成され、前記第1誘電層が強化層に変換される段階と、前記強化第1誘電層の前記一様に平坦な面の上に第2誘電層を形成する段階と、前記強化第1誘電層の上の前記第2誘電層にボンドパッドを形成する段階と、を含む請求項32に記載の方法。
37.そこに前記ボンドパッドを形成する前に少なくとも一度、第1誘電層の形成、パターン形成、強化材料層の形成、材料除去、及び第2誘電層の形成段階を繰り返すプロセスを更に含む請求項36に記載の方法。
38.前記ボンドパッドの下に前記集積回路の少なくとも1つの部分を配置し、前記少なくとも1つの回路部分に少なくとも1つの第1誘電層と前記少なくとも1つの誘電層に配置される第1電導性強化回路構造を供給し、前記ボンドパッドの下に少なくとも1つの第2誘電層を配置し、該第2誘電層に配置される第2強化構造を供給する、ことを含むことを特徴とする半導体集積回路のボンドパッドを強化する方法。
39.前記強化構造が金属を含む請求項38に記載の方法。
40.強化されたボンドパッドを有する集積回路のための構造と製作方法がボンドパッドの下に配置される集積回路の少なくとも1つの部分を含み、この少なくとも1つの回路部分が少なくとも1つの誘電層とこの少なくとも1つの誘電層に配置されるパターン形成された電導性強化構造とを含んでいる。
31 金属パターン
32 金属パターン
40 ボンドパッド
42 バイア
44 誘電層
50 ボンドパッド
53 バイア
200 シリコン基板
210 第1金属層
220 第2金属層
223 強化ダミー構造
230 第3金属層
240 ボンドパッド金属層
Claims (3)
- 半導体集積回路のボンドパッドを強化する方法であって、
ボンドパッドの下に集積回路の少なくとも1つの部分を配置し、
前記配置することが、前記ボンドパッドの下の誘電層内に前記集積回路の前記少なくとも1つの部分を配置して前記誘電層内にパターン形成された電導性金属性強化構造を形成することを含み、
前記誘電層と前記パターン形成された電導性金属性強化構造とが、前記ボンドパッドの下に誘電性部分と金属性部分とを交互に有する平坦な上面を形成し、
そして、前記パターン形成された電導性金属性強化構造が銅を含み、前記誘電層が機械的に弱い低誘電率材料を含む、方法。 - 請求項1に記載の方法であって、
前記誘電層が、前記誘電層内でかつ前記ボンドパッドの下に配置される、パターン形成された金属性ダミー強化構造を更に含む、方法。 - 請求項1又は2に記載の方法であって、
前記パターン形成された強化構造がダマシーンプロセスによって形成される、方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US9296198P | 1998-07-14 | 1998-07-14 | |
US60/092961 | 1998-07-14 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19266699A Division JP5016155B2 (ja) | 1998-07-14 | 1999-07-07 | 能動集積回路上のボンディングのためのシステム及び方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012169663A JP2012169663A (ja) | 2012-09-06 |
JP5758344B2 true JP5758344B2 (ja) | 2015-08-05 |
Family
ID=22235985
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19266699A Expired - Fee Related JP5016155B2 (ja) | 1998-07-14 | 1999-07-07 | 能動集積回路上のボンディングのためのシステム及び方法 |
JP2012106483A Expired - Fee Related JP5758344B2 (ja) | 1998-07-14 | 2012-05-08 | 能動集積回路上のボンディングのためのシステム及び方法 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19266699A Expired - Fee Related JP5016155B2 (ja) | 1998-07-14 | 1999-07-07 | 能動集積回路上のボンディングのためのシステム及び方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US6232662B1 (ja) |
EP (1) | EP0973198A3 (ja) |
JP (2) | JP5016155B2 (ja) |
KR (1) | KR20000011661A (ja) |
Families Citing this family (91)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6965165B2 (en) | 1998-12-21 | 2005-11-15 | Mou-Shiung Lin | Top layers of metal for high performance IC's |
US7405149B1 (en) * | 1998-12-21 | 2008-07-29 | Megica Corporation | Post passivation method for semiconductor chip or wafer |
US8021976B2 (en) * | 2002-10-15 | 2011-09-20 | Megica Corporation | Method of wire bonding over active area of a semiconductor circuit |
JP2000269293A (ja) * | 1999-03-18 | 2000-09-29 | Fujitsu Ltd | 半導体装置 |
JP2000286254A (ja) * | 1999-03-31 | 2000-10-13 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
US6503820B1 (en) * | 1999-10-04 | 2003-01-07 | Koninklijke Philips Electronics N.V. | Die pad crack absorption system and method for integrated circuit chip fabrication |
US6191023B1 (en) * | 1999-11-18 | 2001-02-20 | Taiwan Semiconductor Manufacturing Company | Method of improving copper pad adhesion |
US6198170B1 (en) | 1999-12-16 | 2001-03-06 | Conexant Systems, Inc. | Bonding pad and support structure and method for their fabrication |
US6495917B1 (en) * | 2000-03-17 | 2002-12-17 | International Business Machines Corporation | Method and structure of column interconnect |
US6818990B2 (en) * | 2000-04-03 | 2004-11-16 | Rensselaer Polytechnic Institute | Fluorine diffusion barriers for fluorinated dielectrics in integrated circuits |
JP2003530696A (ja) * | 2000-04-12 | 2003-10-14 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 半導体装置 |
EP1275151A2 (en) * | 2000-04-12 | 2003-01-15 | Koninklijke Philips Electronics N.V. | Bonding pad in semiconductor device |
JP4979154B2 (ja) * | 2000-06-07 | 2012-07-18 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US6380087B1 (en) * | 2000-06-19 | 2002-04-30 | Chartered Semiconductor Manufacturing Inc. | CMP process utilizing dummy plugs in damascene process |
US6683380B2 (en) | 2000-07-07 | 2004-01-27 | Texas Instruments Incorporated | Integrated circuit with bonding layer over active circuitry |
JP2002198374A (ja) * | 2000-10-16 | 2002-07-12 | Sharp Corp | 半導体装置およびその製造方法 |
US6472333B2 (en) * | 2001-03-28 | 2002-10-29 | Applied Materials, Inc. | Silicon carbide cap layers for low dielectric constant silicon oxide layers |
US6800918B2 (en) * | 2001-04-18 | 2004-10-05 | Intel Corporation | EMI and noise shielding for multi-metal layer high frequency integrated circuit processes |
US6501186B1 (en) * | 2001-07-25 | 2002-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd | Bond pad having variable density via support and method for fabrication |
US7148553B1 (en) * | 2001-08-01 | 2006-12-12 | Davies Robert B | Semiconductor device with inductive component and method of making |
US6864166B1 (en) | 2001-08-29 | 2005-03-08 | Micron Technology, Inc. | Method of manufacturing wire bonded microelectronic device assemblies |
SG117395A1 (en) | 2001-08-29 | 2005-12-29 | Micron Technology Inc | Wire bonded microelectronic device assemblies and methods of manufacturing same |
US6875682B1 (en) * | 2001-09-04 | 2005-04-05 | Taiwan Semiconductor Manufacturing Company | Mesh pad structure to eliminate IMD crack on pad |
KR100400047B1 (ko) * | 2001-11-19 | 2003-09-29 | 삼성전자주식회사 | 반도체 소자의 본딩패드 구조 및 그 형성방법 |
US7932603B2 (en) | 2001-12-13 | 2011-04-26 | Megica Corporation | Chip structure and process for forming the same |
US6803662B2 (en) * | 2001-12-21 | 2004-10-12 | International Business Machines Corporation | Low dielectric constant material reinforcement for improved electromigration reliability |
US6765296B2 (en) * | 2002-01-10 | 2004-07-20 | Chartered Semiconductor Manufacturing Ltd. | Via-sea layout integrated circuits |
US7096581B2 (en) * | 2002-03-06 | 2006-08-29 | Stmicroelectronics, Inc. | Method for providing a redistribution metal layer in an integrated circuit |
US6614091B1 (en) * | 2002-03-13 | 2003-09-02 | Motorola, Inc. | Semiconductor device having a wire bond pad and method therefor |
US6921979B2 (en) * | 2002-03-13 | 2005-07-26 | Freescale Semiconductor, Inc. | Semiconductor device having a bond pad and method therefor |
US6844631B2 (en) * | 2002-03-13 | 2005-01-18 | Freescale Semiconductor, Inc. | Semiconductor device having a bond pad and method therefor |
TW539621B (en) * | 2002-04-03 | 2003-07-01 | Benq Corp | Ink jet printer with independent driving circuit for preheat and heat maintance |
US6906361B2 (en) * | 2002-04-08 | 2005-06-14 | Guobiao Zhang | Peripheral circuits of electrically programmable three-dimensional memory |
DE10229493B4 (de) * | 2002-07-01 | 2007-03-29 | Infineon Technologies Ag | Integrierte Halbleiterstruktur |
US6908841B2 (en) * | 2002-09-20 | 2005-06-21 | Infineon Technologies Ag | Support structures for wirebond regions of contact pads over low modulus materials |
US7288845B2 (en) * | 2002-10-15 | 2007-10-30 | Marvell Semiconductor, Inc. | Fabrication of wire bond pads over underlying active devices, passive devices and/or dielectric layers in integrated circuits |
DE10249192A1 (de) | 2002-10-22 | 2004-05-13 | Infineon Technologies Ag | Elektronisches Bauelement mit integriertem passiven elektronischen Bauelement und Verfahren zu dessen Herstellung |
US7023090B2 (en) * | 2003-01-29 | 2006-04-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding pad and via structure design |
JP4170103B2 (ja) * | 2003-01-30 | 2008-10-22 | Necエレクトロニクス株式会社 | 半導体装置、および半導体装置の製造方法 |
US7247939B2 (en) * | 2003-04-01 | 2007-07-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Metal filled semiconductor features with improved structural stability |
US6864578B2 (en) * | 2003-04-03 | 2005-03-08 | International Business Machines Corporation | Internally reinforced bond pads |
US6982493B2 (en) | 2003-04-03 | 2006-01-03 | International Business Machines Corporation | Wedgebond pads having a nonplanar surface structure |
US7566964B2 (en) * | 2003-04-10 | 2009-07-28 | Agere Systems Inc. | Aluminum pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures |
US7453158B2 (en) * | 2003-07-31 | 2008-11-18 | Nvidia Corporation | Pad over active circuit system and method with meshed support structure |
US7495343B1 (en) | 2003-07-31 | 2009-02-24 | Nvidia Corporation | Pad over active circuit system and method with frame support structure |
US7005369B2 (en) * | 2003-08-21 | 2006-02-28 | Intersil American Inc. | Active area bonding compatible high current structures |
JP2005085939A (ja) * | 2003-09-08 | 2005-03-31 | Renesas Technology Corp | 半導体装置およびその製造方法 |
US7067902B2 (en) * | 2003-12-02 | 2006-06-27 | International Business Machines Corporation | Building metal pillars in a chip for structure support |
JP4938983B2 (ja) * | 2004-01-22 | 2012-05-23 | 川崎マイクロエレクトロニクス株式会社 | 半導体集積回路 |
US7629689B2 (en) * | 2004-01-22 | 2009-12-08 | Kawasaki Microelectronics, Inc. | Semiconductor integrated circuit having connection pads over active elements |
JP4913329B2 (ja) * | 2004-02-09 | 2012-04-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US20050191767A1 (en) * | 2004-03-01 | 2005-09-01 | Edwards Henry L. | Focused ion beam circuit repair using a hardmask and wet chemistry |
JP4946436B2 (ja) * | 2004-03-31 | 2012-06-06 | 日本電気株式会社 | 半導体装置及びその製造方法 |
US7157365B2 (en) * | 2004-05-10 | 2007-01-02 | Agere Systems Inc. | Semiconductor device having a dummy conductive via and a method of manufacture therefor |
DE102004025658A1 (de) * | 2004-05-26 | 2005-12-29 | Infineon Technologies Ag | Verfahren zur Herstellung einer Halbleiterschaltung und entsprechende Halbleiterschaltung |
DE102004041961B3 (de) * | 2004-08-31 | 2006-03-30 | Infineon Technologies Ag | Integrierte Halbleiterschaltung mit integrierter Kapazität zwischen Kontaktanscluss und Substrat und Verfahren zu ihrer Herstellung |
JP2006108329A (ja) * | 2004-10-04 | 2006-04-20 | Fujitsu Ltd | 半導体装置 |
US20060091566A1 (en) * | 2004-11-02 | 2006-05-04 | Chin-Tien Yang | Bond pad structure for integrated circuit chip |
US7071575B2 (en) * | 2004-11-10 | 2006-07-04 | United Microelectronics Corp. | Semiconductor chip capable of implementing wire bonding over active circuits |
US7241636B2 (en) * | 2005-01-11 | 2007-07-10 | Freescale Semiconductor, Inc. | Method and apparatus for providing structural support for interconnect pad while allowing signal conductance |
US7247552B2 (en) * | 2005-01-11 | 2007-07-24 | Freescale Semiconductor, Inc. | Integrated circuit having structural support for a flip-chip interconnect pad and method therefor |
US7196428B2 (en) * | 2005-02-15 | 2007-03-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bond pad structure for integrated circuit chip |
US7443020B2 (en) * | 2005-02-28 | 2008-10-28 | Texas Instruments Incorporated | Minimizing number of masks to be changed when changing existing connectivity in an integrated circuit |
JP2006245076A (ja) * | 2005-03-01 | 2006-09-14 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JP4713936B2 (ja) * | 2005-05-09 | 2011-06-29 | 株式会社東芝 | 半導体装置 |
JP5234239B2 (ja) | 2005-07-06 | 2013-07-10 | セイコーエプソン株式会社 | 半導体装置 |
JP4671814B2 (ja) * | 2005-09-02 | 2011-04-20 | パナソニック株式会社 | 半導体装置 |
US7741716B1 (en) * | 2005-11-08 | 2010-06-22 | Altera Corporation | Integrated circuit bond pad structures |
US7205673B1 (en) * | 2005-11-18 | 2007-04-17 | Lsi Logic Corporation | Reduce or eliminate IMC cracking in post wire bonded dies by doping aluminum used in bond pads during Cu/Low-k BEOL processing |
JP4663510B2 (ja) * | 2005-12-21 | 2011-04-06 | パナソニック株式会社 | 半導体装置 |
US7592710B2 (en) * | 2006-03-03 | 2009-09-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bond pad structure for wire bonding |
US20070267748A1 (en) * | 2006-05-16 | 2007-11-22 | Tran Tu-Anh N | Integrated circuit having pads and input/output (i/o) cells |
US7808117B2 (en) * | 2006-05-16 | 2010-10-05 | Freescale Semiconductor, Inc. | Integrated circuit having pads and input/output (I/O) cells |
JP5022643B2 (ja) | 2006-07-13 | 2012-09-12 | 株式会社東芝 | 半導体装置のesd保護回路 |
US7679180B2 (en) * | 2006-11-07 | 2010-03-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bond pad design to minimize dielectric cracking |
JP5507796B2 (ja) * | 2007-02-22 | 2014-05-28 | 日本電気株式会社 | 集積回路 |
DE102007011126B4 (de) * | 2007-03-07 | 2009-08-27 | Austriamicrosystems Ag | Halbleiterbauelement mit Anschlusskontaktfläche |
US7919839B2 (en) * | 2007-07-24 | 2011-04-05 | Northrop Grumman Systems Corporation | Support structures for on-wafer testing of wafer-level packages and multiple wafer stacked structures |
US8178980B2 (en) * | 2008-02-05 | 2012-05-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bond pad structure |
US8581423B2 (en) | 2008-11-17 | 2013-11-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Double solid metal pad with reduced area |
US9000558B2 (en) * | 2009-01-19 | 2015-04-07 | Broadcom Corporation | Wafer-level flip chip package with RF passive element/ package signal connection overlay |
US9035281B2 (en) | 2009-06-30 | 2015-05-19 | Nokia Technologies Oy | Graphene device and method of fabricating a graphene device |
JP2012039001A (ja) * | 2010-08-10 | 2012-02-23 | Renesas Electronics Corp | 半導体装置 |
US20130154099A1 (en) | 2011-12-16 | 2013-06-20 | Semiconductor Components Industries, Llc | Pad over interconnect pad structure design |
KR101916088B1 (ko) * | 2012-04-02 | 2018-11-07 | 삼성전자주식회사 | 반도체 패키지 |
CN103390647A (zh) * | 2012-05-10 | 2013-11-13 | 无锡华润上华半导体有限公司 | 一种功率mos器件结构 |
US9768221B2 (en) | 2013-06-27 | 2017-09-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Pad structure layout for semiconductor device |
US8963343B1 (en) * | 2013-09-27 | 2015-02-24 | Cypress Semiconductor Corporation | Ferroelectric memories with a stress buffer |
CN103630254B (zh) * | 2013-11-18 | 2015-12-02 | 西安电子科技大学 | 一种石墨烯温度传感器及其制备工艺 |
CN104765481B (zh) * | 2014-01-06 | 2019-05-28 | 宸鸿科技(厦门)有限公司 | 触控面板及其制作方法 |
US10896888B2 (en) * | 2018-03-15 | 2021-01-19 | Microchip Technology Incorporated | Integrated circuit (IC) device including a force mitigation system for reducing under-pad damage caused by wire bond |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5220199A (en) * | 1988-09-13 | 1993-06-15 | Hitachi, Ltd. | Semiconductor integrated circuit device in which a semiconductor chip is mounted with solder bumps for mounting to a wiring substrate |
JP3022565B2 (ja) * | 1988-09-13 | 2000-03-21 | 株式会社日立製作所 | 半導体装置 |
JP2598328B2 (ja) * | 1989-10-17 | 1997-04-09 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
JPH0567645A (ja) * | 1991-09-10 | 1993-03-19 | Matsushita Electron Corp | 半導体装置 |
JPH05183007A (ja) * | 1991-10-29 | 1993-07-23 | Nec Corp | 半導体基板等のパッド構造 |
JP2916326B2 (ja) * | 1992-06-11 | 1999-07-05 | 三菱電機株式会社 | 半導体装置のパッド構造 |
JPH06224196A (ja) * | 1993-01-28 | 1994-08-12 | Hitachi Ltd | 半導体集積回路装置 |
EP0637840A1 (en) * | 1993-08-05 | 1995-02-08 | AT&T Corp. | Integrated circuit with active devices under bond pads |
JPH08213422A (ja) * | 1995-02-07 | 1996-08-20 | Mitsubishi Electric Corp | 半導体装置およびそのボンディングパッド構造 |
JPH08293523A (ja) * | 1995-02-21 | 1996-11-05 | Seiko Epson Corp | 半導体装置およびその製造方法 |
JPH1022322A (ja) * | 1996-06-28 | 1998-01-23 | Denso Corp | 半導体装置 |
KR980011851A (ko) * | 1996-07-13 | 1998-04-30 | 김광호 | 홀 비아(Hole Via)를 이용한 다층 금속 배선의 금속층간 접속 구조 및 본딩 패드 |
JP3482779B2 (ja) * | 1996-08-20 | 2004-01-06 | セイコーエプソン株式会社 | 半導体装置およびその製造方法 |
JP3526376B2 (ja) * | 1996-08-21 | 2004-05-10 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP3459529B2 (ja) * | 1996-12-19 | 2003-10-20 | 三洋電機株式会社 | 半導体集積回路装置とその製造方法 |
US6143396A (en) * | 1997-05-01 | 2000-11-07 | Texas Instruments Incorporated | System and method for reinforcing a bond pad |
US6037668A (en) * | 1998-11-13 | 2000-03-14 | Motorola, Inc. | Integrated circuit having a support structure |
-
1999
- 1999-07-02 US US09/347,212 patent/US6232662B1/en not_active Expired - Lifetime
- 1999-07-07 JP JP19266699A patent/JP5016155B2/ja not_active Expired - Fee Related
- 1999-07-13 KR KR1019990028134A patent/KR20000011661A/ko not_active Application Discontinuation
- 1999-07-14 EP EP99202296A patent/EP0973198A3/en not_active Withdrawn
-
2012
- 2012-05-08 JP JP2012106483A patent/JP5758344B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2000049190A (ja) | 2000-02-18 |
KR20000011661A (ko) | 2000-02-25 |
EP0973198A3 (en) | 2003-03-19 |
JP5016155B2 (ja) | 2012-09-05 |
JP2012169663A (ja) | 2012-09-06 |
US6232662B1 (en) | 2001-05-15 |
EP0973198A2 (en) | 2000-01-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5758344B2 (ja) | 能動集積回路上のボンディングのためのシステム及び方法 | |
US7459792B2 (en) | Via layout with via groups placed in interlocked arrangement | |
US6384486B2 (en) | Bonding over integrated circuits | |
US6448650B1 (en) | Fine pitch system and method for reinforcing bond pads in semiconductor devices | |
JP3954974B2 (ja) | 半導体デバイス | |
US6028367A (en) | Bonds pads equipped with heat dissipating rings and method for forming | |
JP3672752B2 (ja) | デュアルダマシン構造体とその形成方法 | |
US8034703B2 (en) | Semiconductor device and method for manufacturing the same | |
KR100411576B1 (ko) | 구리 패드 구조 | |
US6908841B2 (en) | Support structures for wirebond regions of contact pads over low modulus materials | |
US7521355B2 (en) | Integrated circuit insulators and related methods | |
JP2012028795A (ja) | ボンド・パッドを補強する方法およびシステム | |
JP2001102453A (ja) | 集積回路チップ構造及びその製造方法 | |
EP1548815A1 (en) | Semiconductor device and its manufacturing method | |
US6927472B2 (en) | Fuse structure and method to form the same | |
JP3645129B2 (ja) | 半導体装置の製造方法 | |
KR100691051B1 (ko) | 반도체 디바이스 및 본드 패드 형성 프로세스 | |
US20020068385A1 (en) | Method for forming anchored bond pads in semiconductor devices and devices formed | |
US20040266174A1 (en) | Method and apparatus of preventing tungsten pullout during tungsten chemical mill processing | |
US6501186B1 (en) | Bond pad having variable density via support and method for fabrication | |
JP2005317835A (ja) | 半導体装置 | |
JP2000357708A (ja) | ボンディングパッド構造とその製法 | |
WO2001099184A2 (en) | Dual damascene process utilizing a low-k dual dielectric | |
US20070296083A1 (en) | Low dielectric constant integrated circuit insulators and methods |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20131126 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20131204 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20140304 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20140307 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140403 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140604 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20141217 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150416 |
|
A911 | Transfer of reconsideration by examiner before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20150424 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150601 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150603 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5758344 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |