JP5654206B2 - Soi基板の作製方法及び該soi基板を用いた半導体装置 - Google Patents
Soi基板の作製方法及び該soi基板を用いた半導体装置 Download PDFInfo
- Publication number
- JP5654206B2 JP5654206B2 JP2009069537A JP2009069537A JP5654206B2 JP 5654206 B2 JP5654206 B2 JP 5654206B2 JP 2009069537 A JP2009069537 A JP 2009069537A JP 2009069537 A JP2009069537 A JP 2009069537A JP 5654206 B2 JP5654206 B2 JP 5654206B2
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- Prior art keywords
- single crystal
- crystal semiconductor
- semiconductor layer
- substrate
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1914—Preparing SOI wafers using bonding
- H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
- H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
- H10D30/6743—Silicon
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009069537A JP5654206B2 (ja) | 2008-03-26 | 2009-03-23 | Soi基板の作製方法及び該soi基板を用いた半導体装置 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008079592 | 2008-03-26 | ||
| JP2008079592 | 2008-03-26 | ||
| JP2009069537A JP5654206B2 (ja) | 2008-03-26 | 2009-03-23 | Soi基板の作製方法及び該soi基板を用いた半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009260314A JP2009260314A (ja) | 2009-11-05 |
| JP2009260314A5 JP2009260314A5 (https=) | 2012-04-19 |
| JP5654206B2 true JP5654206B2 (ja) | 2015-01-14 |
Family
ID=41200421
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009069537A Expired - Fee Related JP5654206B2 (ja) | 2008-03-26 | 2009-03-23 | Soi基板の作製方法及び該soi基板を用いた半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8530332B2 (https=) |
| JP (1) | JP5654206B2 (https=) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060228492A1 (en) * | 2005-04-07 | 2006-10-12 | Sumco Corporation | Method for manufacturing SIMOX wafer |
| JP2009260315A (ja) * | 2008-03-26 | 2009-11-05 | Semiconductor Energy Lab Co Ltd | Soi基板の作製方法及び半導体装置の作製方法 |
| EP2105957A3 (en) * | 2008-03-26 | 2011-01-19 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing soi substrate and method for manufacturing semiconductor device |
| JP5535610B2 (ja) * | 2009-12-22 | 2014-07-02 | 三菱重工業株式会社 | Soi半導体基板製造方法 |
| JP5755931B2 (ja) | 2010-04-28 | 2015-07-29 | 株式会社半導体エネルギー研究所 | 半導体膜の作製方法、電極の作製方法、2次電池の作製方法、および太陽電池の作製方法 |
| JP5565128B2 (ja) * | 2010-06-17 | 2014-08-06 | 信越半導体株式会社 | 貼り合わせウエーハの製造方法 |
| FR2971365B1 (fr) * | 2011-02-08 | 2013-02-22 | Soitec Silicon On Insulator | Méthode de recyclage d'un substrat source |
| JP5799740B2 (ja) * | 2011-10-17 | 2015-10-28 | 信越半導体株式会社 | 剥離ウェーハの再生加工方法 |
| JP6056516B2 (ja) * | 2013-02-01 | 2017-01-11 | 信越半導体株式会社 | Soiウェーハの製造方法及びsoiウェーハ |
| US10002800B2 (en) * | 2016-05-13 | 2018-06-19 | International Business Machines Corporation | Prevention of charging damage in full-depletion devices |
| DE102016112139B3 (de) * | 2016-07-01 | 2018-01-04 | Infineon Technologies Ag | Verfahren zum Reduzieren einer Verunreinigungskonzentration in einem Halbleiterkörper |
| CN108231905A (zh) * | 2017-12-13 | 2018-06-29 | 华南理工大学 | 一种激光处理非晶氧化物薄膜晶体管的制备方法 |
| KR102944322B1 (ko) * | 2018-07-19 | 2026-03-27 | 도쿄엘렉트론가부시키가이샤 | 기판 처리 시스템 및 기판 처리 방법 |
| US11643724B2 (en) * | 2019-07-18 | 2023-05-09 | Asm Ip Holding B.V. | Method of forming structures using a neutral beam |
| CN114005753B (zh) * | 2021-10-29 | 2023-07-11 | 西安微电子技术研究所 | 一种igbt产品的氧化工艺方法及氧化后igbt产品 |
Family Cites Families (59)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0254532A (ja) * | 1988-08-17 | 1990-02-23 | Sony Corp | Soi基板の製造方法 |
| FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| JP3085184B2 (ja) | 1996-03-22 | 2000-09-04 | 住友金属工業株式会社 | Soi基板及びその製造方法 |
| JP2856157B2 (ja) * | 1996-07-16 | 1999-02-10 | 日本電気株式会社 | 半導体装置の製造方法 |
| US6287900B1 (en) * | 1996-08-13 | 2001-09-11 | Semiconductor Energy Laboratory Co., Ltd | Semiconductor device with catalyst addition and removal |
| JP3257624B2 (ja) * | 1996-11-15 | 2002-02-18 | キヤノン株式会社 | 半導体部材の製造方法 |
| US6534380B1 (en) | 1997-07-18 | 2003-03-18 | Denso Corporation | Semiconductor substrate and method of manufacturing the same |
| JP2000012864A (ja) | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| JP3358550B2 (ja) * | 1998-07-07 | 2002-12-24 | 信越半導体株式会社 | Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ |
| JP3921823B2 (ja) | 1998-07-15 | 2007-05-30 | 信越半導体株式会社 | Soiウェーハの製造方法およびsoiウェーハ |
| US6271101B1 (en) | 1998-07-29 | 2001-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Process for production of SOI substrate and process for production of semiconductor device |
| JP2000077287A (ja) * | 1998-08-26 | 2000-03-14 | Nissin Electric Co Ltd | 結晶薄膜基板の製造方法 |
| JP4476390B2 (ja) * | 1998-09-04 | 2010-06-09 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP2000124092A (ja) | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
| JP4379943B2 (ja) * | 1999-04-07 | 2009-12-09 | 株式会社デンソー | 半導体基板の製造方法および半導体基板製造装置 |
| JP3425392B2 (ja) * | 1999-05-27 | 2003-07-14 | シャープ株式会社 | 半導体装置の製造方法 |
| FR2797713B1 (fr) * | 1999-08-20 | 2002-08-02 | Soitec Silicon On Insulator | Procede de traitement de substrats pour la microelectronique et substrats obtenus par ce procede |
| TW544938B (en) | 2001-06-01 | 2003-08-01 | Semiconductor Energy Lab | Method of manufacturing a semiconductor device |
| US7199027B2 (en) | 2001-07-10 | 2007-04-03 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor film by plasma CVD using a noble gas and nitrogen |
| JP4024508B2 (ja) | 2001-10-09 | 2007-12-19 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| DE10224160A1 (de) | 2002-05-31 | 2003-12-18 | Advanced Micro Devices Inc | Eine Diffusionsbarrierenschicht in Halbleitersubstraten zur Reduzierung der Kupferkontamination von der Rückseite her |
| JP4289837B2 (ja) | 2002-07-15 | 2009-07-01 | アプライド マテリアルズ インコーポレイテッド | イオン注入方法及びsoiウエハの製造方法 |
| US7129123B2 (en) | 2002-08-27 | 2006-10-31 | Shin-Etsu Handotai Co., Ltd. | SOI wafer and a method for producing an SOI wafer |
| JP2004193515A (ja) | 2002-12-13 | 2004-07-08 | Shin Etsu Handotai Co Ltd | Soiウエーハの製造方法 |
| JP2004247610A (ja) | 2003-02-14 | 2004-09-02 | Canon Inc | 基板の製造方法 |
| US20040192067A1 (en) | 2003-02-28 | 2004-09-30 | Bruno Ghyselen | Method for forming a relaxed or pseudo-relaxed useful layer on a substrate |
| US7348222B2 (en) | 2003-06-30 | 2008-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a thin film transistor and method for manufacturing a semiconductor device |
| DE10336271B4 (de) * | 2003-08-07 | 2008-02-07 | Siltronic Ag | Siliciumscheibe und Verfahren zu deren Herstellung |
| DE60323098D1 (de) | 2003-09-26 | 2008-10-02 | Soitec Silicon On Insulator | Verfahren zur Herstellung vonn Substraten für epitakitisches Wachstum |
| JP4285244B2 (ja) * | 2004-01-08 | 2009-06-24 | 株式会社Sumco | Soiウェーハの作製方法 |
| JP5110772B2 (ja) | 2004-02-03 | 2012-12-26 | 株式会社半導体エネルギー研究所 | 半導体薄膜層を有する基板の製造方法 |
| JP4617820B2 (ja) * | 2004-10-20 | 2011-01-26 | 信越半導体株式会社 | 半導体ウェーハの製造方法 |
| US7737053B2 (en) * | 2004-11-18 | 2010-06-15 | Semiconductor Energy Laboratory Co., Ltd | Semiconductor device and manufacturing method of the same |
| JP2007180416A (ja) * | 2005-12-28 | 2007-07-12 | Siltronic Ag | Soiウェーハの製造方法 |
| US7579654B2 (en) * | 2006-05-31 | 2009-08-25 | Corning Incorporated | Semiconductor on insulator structure made using radiation annealing |
| US20070281440A1 (en) * | 2006-05-31 | 2007-12-06 | Jeffrey Scott Cites | Producing SOI structure using ion shower |
| US7755113B2 (en) * | 2007-03-16 | 2010-07-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, semiconductor display device, and manufacturing method of semiconductor device |
| CN101281912B (zh) | 2007-04-03 | 2013-01-23 | 株式会社半导体能源研究所 | Soi衬底及其制造方法以及半导体装置 |
| KR101440930B1 (ko) | 2007-04-20 | 2014-09-15 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Soi 기판의 제작방법 |
| EP2140480A4 (en) | 2007-04-20 | 2015-04-22 | Semiconductor Energy Lab | METHOD FOR PRODUCING AN SOI SUBSTRATE AND SEMICONDUCTOR ARRANGEMENT |
| KR101436116B1 (ko) | 2007-04-27 | 2014-09-01 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Soi 기판 및 그 제조 방법, 및 반도체 장치 |
| JP5289805B2 (ja) | 2007-05-10 | 2013-09-11 | 株式会社半導体エネルギー研究所 | 半導体装置製造用基板の作製方法 |
| US7960262B2 (en) | 2007-05-18 | 2011-06-14 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device by applying laser beam to single-crystal semiconductor layer and non-single-crystal semiconductor layer through cap film |
| EP1993127B1 (en) | 2007-05-18 | 2013-04-24 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of SOI substrate |
| KR101400699B1 (ko) * | 2007-05-18 | 2014-05-29 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 기판 및 반도체 장치 및 그 제조 방법 |
| US7745268B2 (en) | 2007-06-01 | 2010-06-29 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a semiconductor device with irradiation of single crystal semiconductor layer in an inert atmosphere |
| US7772054B2 (en) | 2007-06-15 | 2010-08-10 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| US7795114B2 (en) | 2007-08-10 | 2010-09-14 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing methods of SOI substrate and semiconductor device |
| US8236668B2 (en) * | 2007-10-10 | 2012-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| JP5688203B2 (ja) | 2007-11-01 | 2015-03-25 | 株式会社半導体エネルギー研究所 | 半導体基板の作製方法 |
| JP5248995B2 (ja) | 2007-11-30 | 2013-07-31 | 株式会社半導体エネルギー研究所 | 光電変換装置の製造方法 |
| JP5248994B2 (ja) | 2007-11-30 | 2013-07-31 | 株式会社半導体エネルギー研究所 | 光電変換装置の製造方法 |
| US7781308B2 (en) | 2007-12-03 | 2010-08-24 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| JP5572307B2 (ja) | 2007-12-28 | 2014-08-13 | 株式会社半導体エネルギー研究所 | 光電変換装置の製造方法 |
| US7858495B2 (en) | 2008-02-04 | 2010-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| CN101504930B (zh) | 2008-02-06 | 2013-10-16 | 株式会社半导体能源研究所 | Soi衬底的制造方法 |
| EP2105957A3 (en) | 2008-03-26 | 2011-01-19 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing soi substrate and method for manufacturing semiconductor device |
| JP2009260313A (ja) | 2008-03-26 | 2009-11-05 | Semiconductor Energy Lab Co Ltd | Soi基板の作製方法及び半導体装置の作製方法 |
| JP2009260315A (ja) | 2008-03-26 | 2009-11-05 | Semiconductor Energy Lab Co Ltd | Soi基板の作製方法及び半導体装置の作製方法 |
-
2009
- 2009-03-23 JP JP2009069537A patent/JP5654206B2/ja not_active Expired - Fee Related
- 2009-03-25 US US12/410,649 patent/US8530332B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2009260314A (ja) | 2009-11-05 |
| US20090261449A1 (en) | 2009-10-22 |
| US8530332B2 (en) | 2013-09-10 |
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