JP5185352B2 - 多層プリント回路基板の製造方法 - Google Patents
多層プリント回路基板の製造方法 Download PDFInfo
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- JP5185352B2 JP5185352B2 JP2010251951A JP2010251951A JP5185352B2 JP 5185352 B2 JP5185352 B2 JP 5185352B2 JP 2010251951 A JP2010251951 A JP 2010251951A JP 2010251951 A JP2010251951 A JP 2010251951A JP 5185352 B2 JP5185352 B2 JP 5185352B2
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- 238000000034 method Methods 0.000 title claims description 79
- 238000004519 manufacturing process Methods 0.000 title claims description 62
- 229920005989 resin Polymers 0.000 claims description 66
- 239000011347 resin Substances 0.000 claims description 66
- 229910000679 solder Inorganic materials 0.000 claims description 41
- 239000000853 adhesive Substances 0.000 claims description 14
- 230000001070 adhesive effect Effects 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 11
- 238000010438 heat treatment Methods 0.000 claims description 8
- 238000002679 ablation Methods 0.000 claims description 5
- 238000007641 inkjet printing Methods 0.000 claims description 5
- 230000008569 process Effects 0.000 description 32
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 17
- 239000011889 copper foil Substances 0.000 description 16
- 239000002184 metal Substances 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000003822 epoxy resin Substances 0.000 description 6
- 229920000647 polyepoxide Polymers 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 238000000059 patterning Methods 0.000 description 3
- 239000000654 additive Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000010292 electrical insulation Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009429 electrical wiring Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000004088 foaming agent Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/50—Fixed connections
- H01R12/51—Fixed connections for rigid printed circuits or like structures
- H01R12/52—Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
- H01R12/523—Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures by an interconnection through aligned holes in the boards or multilayer board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0367—Metallic bump or raised conductor not used as solder bump
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09481—Via in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/016—Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1536—Temporarily stacked PCBs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/207—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a prefabricated paste pattern, ink pattern or powder pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Laser Beam Processing (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
本発明の他の目的は、一対の支持部を付着させ、両面にビルドアップ層を形成することにより、生産性が高い多層プリント基板およびその製造方法を提供することにある。
また、本発明によれば、一対の絶縁支持層を付着させ、両面にビルドアップ層を形成することにより、生産性が増大する。
また、本発明によれば、絶縁支持層に形成されたバンプは、絶縁支持層の強度を増大させて製造工程中に絶縁支持層の支持機能を助け、電子部品等と多層プリント基板とを連結する連結部としての二重的機能を行う。
また、本発明によれば、バンプが円錐型の形状を持つことにより、外部電子部品との微細接触が可能である。
102、202 支持体
103、203 バンプ
104、204 絶縁支持層
108、208 ビルドアップ層
110、210 半田ボールパッド
112、212 半田レジスト層
114、214 半田ボール
215 熱接着剤
Claims (9)
- (A)バンプ(103)がプリントされた支持体(102)の一面に絶縁樹脂層(101)を形成する段階と、
(B)前記支持体(102)を除去して絶縁支持層(104)を製造する段階と、
(C)前記支持体(102)が除去された前記絶縁支持層(104)に、多数の回路層(109)と多数の絶縁層(111)を含むビルドアップ層(108)を形成する段階と、
(D)前記ビルドアップ層(108)の最外層に半田レジスト層(112)を形成する段階と、を含み、
前記(A)段階において、前記支持体(102)に形成された前記絶縁樹脂層(101)の厚さは前記バンプ(103)の高さより大きいことを特徴とし、
前記(D)段階の後、前記バンプ(103)の一部が露出するように前記絶縁樹脂層(101)の一部を厚さ方向に除去する段階をさらに含むことを特徴とする、多層プリント基板の製造方法。 - 前記絶縁樹脂層(101)の除去はLDA(Laser Direct Ablation)によって行われることを特徴とする、請求項1に記載の多層プリント基板の製造方法。
- 前記絶縁樹脂層(101)は、インクジェットプリンティング方式によってコートされることにより、前記支持体(102)の一面に形成されることを特徴とする、請求項1に記載の多層プリント基板の製造方法。
- (A)バンプ(203)がプリントされた支持体(202)の一面に絶縁樹脂層(201)を形成する段階と、
(B)前記支持体(202)を除去して絶縁支持層(204)を製造する段階と、
(C)前記支持体(202)が除去されなかった前記絶縁支持層(204)の一面が互いに対向するように一対の前記絶縁支持層(204)を整列し、接着手段を用いて一対の前記絶縁樹脂層(201、201)を接着させる段階と、
(D)前記支持体(202)が除去された絶縁支持層(204)の他面に、多数の回路層(209)および多数の絶縁層(211)を含むビルドアップ層(208)を形成する段階と、
(E)前記ビルドアップ層(208)の最外層に半田レジスト層(212)を形成する段階と、
(F)前記一対のビルドアップ層(208、208)および前記半田レジスト層(212、212)が形成された前記絶縁支持層(204)をそれぞれ分離する段階とを含むことを特徴とする、多層プリント基板の製造方法。 - 前記(A)段階において、前記支持体(202)に形成された前記絶縁樹脂層(201)の厚さは前記バンプ(203)の高さより大きいことを特徴とする、請求項4に記載の多層プリント基板の製造方法。
- 前記(F)段階の後、前記バンプ(203)の一部が露出するように前記絶縁樹脂層(201)の一部を厚さ方向に除去する段階をさらに含むことを特徴とする、請求項5に記載の多層プリント基板の製造方法。
- 前記絶縁樹脂層(201)の除去はLDA(Laser Direct Ablation)によって行われることを特徴とする、請求項6に記載の多層プリント基板の製造方法。
- 前記絶縁樹脂層(201)は、インクジェットプリンティング方式によってコートされることにより、前記支持体(202)の一面に形成されることを特徴とする、請求項4に記載の多層プリント基板の製造方法。
- 前記接着手段は、熱処理の際に非接着性を示す熱接着剤(215)であることを特徴とする、請求項4に記載の多層プリント基板の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2008-0031246 | 2008-04-03 | ||
KR1020080031246A KR101044103B1 (ko) | 2008-04-03 | 2008-04-03 | 다층 인쇄회로기판 및 그 제조방법 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008158130A Division JP2009253262A (ja) | 2008-04-03 | 2008-06-17 | 多層プリント回路基板およびその製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012235945A Division JP5536852B2 (ja) | 2008-04-03 | 2012-10-25 | 多層プリント回路基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011071533A JP2011071533A (ja) | 2011-04-07 |
JP5185352B2 true JP5185352B2 (ja) | 2013-04-17 |
Family
ID=41132219
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008158130A Pending JP2009253262A (ja) | 2008-04-03 | 2008-06-17 | 多層プリント回路基板およびその製造方法 |
JP2010251951A Expired - Fee Related JP5185352B2 (ja) | 2008-04-03 | 2010-11-10 | 多層プリント回路基板の製造方法 |
JP2012235945A Expired - Fee Related JP5536852B2 (ja) | 2008-04-03 | 2012-10-25 | 多層プリント回路基板の製造方法 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008158130A Pending JP2009253262A (ja) | 2008-04-03 | 2008-06-17 | 多層プリント回路基板およびその製造方法 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012235945A Expired - Fee Related JP5536852B2 (ja) | 2008-04-03 | 2012-10-25 | 多層プリント回路基板の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20090250259A1 (ja) |
JP (3) | JP2009253262A (ja) |
KR (1) | KR101044103B1 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100757910B1 (ko) * | 2006-07-06 | 2007-09-11 | 삼성전기주식회사 | 매립패턴기판 및 그 제조방법 |
KR101095253B1 (ko) * | 2009-12-14 | 2011-12-20 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
US8067266B2 (en) * | 2009-12-23 | 2011-11-29 | Intel Corporation | Methods for the fabrication of microelectronic device substrates by attaching two cores together during fabrication |
US8674235B2 (en) * | 2011-06-06 | 2014-03-18 | Intel Corporation | Microelectronic substrate for alternate package functionality |
KR101877307B1 (ko) * | 2012-07-09 | 2018-07-11 | 삼성전자주식회사 | 반도체 패키지 기판 및 이를 이용한 반도체 패키지 제조 방법 |
KR20140134479A (ko) * | 2013-05-14 | 2014-11-24 | 삼성전기주식회사 | 인쇄회로기판 |
JP2015159223A (ja) * | 2014-02-25 | 2015-09-03 | 凸版印刷株式会社 | ポスト電極、ポスト電極の製造方法および回路基板 |
CN104883824A (zh) * | 2015-05-15 | 2015-09-02 | 胜宏科技(惠州)股份有限公司 | 一种线路板阻焊上pad的处理方法 |
CN106378533A (zh) * | 2016-09-20 | 2017-02-08 | 武汉吉事达科技股份有限公司 | 一种银浆激光蚀刻图形拼接方法 |
Family Cites Families (16)
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JP3167840B2 (ja) * | 1993-04-16 | 2001-05-21 | 株式会社東芝 | 印刷配線板および印刷配線板の製造方法 |
US5600103A (en) * | 1993-04-16 | 1997-02-04 | Kabushiki Kaisha Toshiba | Circuit devices and fabrication method of the same |
JPH11289165A (ja) * | 1998-04-03 | 1999-10-19 | Toshiba Corp | 多層配線基板およびその製造方法 |
EP1843650B1 (en) * | 1998-09-03 | 2012-03-07 | Ibiden Co., Ltd. | Method of manufacturing a multilayered printed circuit board |
JP2001057472A (ja) * | 1999-08-18 | 2001-02-27 | Hitachi Chem Co Ltd | 多層印刷配線板の製造方法 |
US6770547B1 (en) * | 1999-10-29 | 2004-08-03 | Renesas Technology Corporation | Method for producing a semiconductor device |
JP4592890B2 (ja) * | 1999-11-26 | 2010-12-08 | イビデン株式会社 | 多層回路基板 |
JP2002374068A (ja) * | 2001-06-14 | 2002-12-26 | Kyocera Chemical Corp | 多層プリント配線板の製造方法 |
JP4045143B2 (ja) * | 2002-02-18 | 2008-02-13 | テセラ・インターコネクト・マテリアルズ,インコーポレイテッド | 配線膜間接続用部材の製造方法及び多層配線基板の製造方法 |
JP3925283B2 (ja) * | 2002-04-16 | 2007-06-06 | セイコーエプソン株式会社 | 電子デバイスの製造方法、電子機器の製造方法 |
JP2005045191A (ja) * | 2003-07-04 | 2005-02-17 | North:Kk | 配線回路基板の製造方法、及び多層配線基板の製造方法 |
KR100722604B1 (ko) * | 2005-09-02 | 2007-05-28 | 삼성전기주식회사 | 인쇄회로기판의 제조방법 |
JP2007173622A (ja) * | 2005-12-22 | 2007-07-05 | Kyocer Slc Technologies Corp | 配線基板の製造方法 |
JP2007173727A (ja) * | 2005-12-26 | 2007-07-05 | Shinko Electric Ind Co Ltd | 配線基板の製造方法 |
KR100744993B1 (ko) * | 2006-01-25 | 2007-08-02 | 삼성전기주식회사 | 다층 인쇄회로기판 및 그 제작방법 |
KR100796523B1 (ko) * | 2006-08-17 | 2008-01-21 | 삼성전기주식회사 | 전자부품 내장형 다층 인쇄배선기판 및 그 제조방법 |
-
2008
- 2008-04-03 KR KR1020080031246A patent/KR101044103B1/ko active IP Right Grant
- 2008-06-17 JP JP2008158130A patent/JP2009253262A/ja active Pending
- 2008-07-03 US US12/216,435 patent/US20090250259A1/en not_active Abandoned
-
2010
- 2010-11-10 JP JP2010251951A patent/JP5185352B2/ja not_active Expired - Fee Related
-
2012
- 2012-10-25 JP JP2012235945A patent/JP5536852B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20090250259A1 (en) | 2009-10-08 |
JP2013030807A (ja) | 2013-02-07 |
JP2011071533A (ja) | 2011-04-07 |
JP2009253262A (ja) | 2009-10-29 |
KR20090105661A (ko) | 2009-10-07 |
KR101044103B1 (ko) | 2011-06-28 |
JP5536852B2 (ja) | 2014-07-02 |
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