JP5150518B2 - 半導体装置および多層配線基板ならびにそれらの製造方法 - Google Patents

半導体装置および多層配線基板ならびにそれらの製造方法 Download PDF

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Publication number
JP5150518B2
JP5150518B2 JP2009001253A JP2009001253A JP5150518B2 JP 5150518 B2 JP5150518 B2 JP 5150518B2 JP 2009001253 A JP2009001253 A JP 2009001253A JP 2009001253 A JP2009001253 A JP 2009001253A JP 5150518 B2 JP5150518 B2 JP 5150518B2
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Prior art keywords
insulating layer
wiring board
multilayer wiring
pad
pads
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Expired - Fee Related
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JP2009001253A
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English (en)
Japanese (ja)
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JP2009260255A (ja
JP2009260255A5 (enExample
Inventor
清己 萩原
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Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2009001253A priority Critical patent/JP5150518B2/ja
Priority to PCT/JP2009/000719 priority patent/WO2009118999A1/ja
Publication of JP2009260255A publication Critical patent/JP2009260255A/ja
Priority to US12/707,927 priority patent/US8324740B2/en
Publication of JP2009260255A5 publication Critical patent/JP2009260255A5/ja
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Publication of JP5150518B2 publication Critical patent/JP5150518B2/ja
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K1/00—Printed circuits
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    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
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    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
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    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
JP2009001253A 2008-03-25 2009-01-07 半導体装置および多層配線基板ならびにそれらの製造方法 Expired - Fee Related JP5150518B2 (ja)

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PCT/JP2009/000719 WO2009118999A1 (ja) 2008-03-25 2009-02-19 半導体装置ならびに多層配線基板および半導体装置の製造方法
US12/707,927 US8324740B2 (en) 2008-03-25 2010-02-18 Semiconductor device, and method of manufacturing multilayer wiring board and semiconductor device

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JP5357784B2 (ja) * 2010-01-05 2013-12-04 パナソニック株式会社 半導体装置及びその製造方法
JP2011211072A (ja) * 2010-03-30 2011-10-20 Fujitsu Ltd プリント配線板およびプリント配線板の作製方法
JP2011243880A (ja) * 2010-05-20 2011-12-01 Panasonic Corp 半導体装置およびその製造方法
US20120032337A1 (en) * 2010-08-06 2012-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Flip Chip Substrate Package Assembly and Process for Making Same
JP5644286B2 (ja) * 2010-09-07 2014-12-24 オムロン株式会社 電子部品の表面実装方法及び電子部品が実装された基板
US8624392B2 (en) 2011-06-03 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Electrical connection for chip scale packaging
US8674235B2 (en) 2011-06-06 2014-03-18 Intel Corporation Microelectronic substrate for alternate package functionality
DE112012003858T5 (de) * 2011-09-15 2014-07-10 Flipchip International, Llc Hochpräzise selbstausrichtender Chip zur Ausbildung von eingebetteten Chip aufweisendem Gehäuse
US8912668B2 (en) 2012-03-01 2014-12-16 Taiwan Semiconductor Manufacturing Company, Ltd. Electrical connections for chip scale packaging
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