JP5043333B2 - 親水性Ｓｉ表面と界面接合酸化物の溶解とを用いるＳｉ間擬似疎水性ウェハ接合 - Google Patents

親水性Ｓｉ表面と界面接合酸化物の溶解とを用いるＳｉ間擬似疎水性ウェハ接合 Download PDF

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Publication number
JP5043333B2
JP5043333B2 JP2005363874A JP2005363874A JP5043333B2 JP 5043333 B2 JP5043333 B2 JP 5043333B2 JP 2005363874 A JP2005363874 A JP 2005363874A JP 2005363874 A JP2005363874 A JP 2005363874A JP 5043333 B2 JP5043333 B2 JP 5043333B2
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oxide
annealing
layer
bonding
wafer
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JP2005363874A
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Japanese (ja)
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JP2006191029A (ja
JP2006191029A5 (https=
Inventor
ジョエル・ピー・デソウザ
ジョン・エイ・オット
アレクサンダー・レズニチェック
デベンドラ・ケイ・サダナ
キャサリン・エル・シーンガー
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International Business Machines Corp
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International Business Machines Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Element Separation (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP2005363874A 2005-01-07 2005-12-16 親水性Ｓｉ表面と界面接合酸化物の溶解とを用いるＳｉ間擬似疎水性ウェハ接合 Expired - Fee Related JP5043333B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/031,165 2005-01-07
US11/031,165 US8138061B2 (en) 2005-01-07 2005-01-07 Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide

Publications (3)

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JP2006191029A JP2006191029A (ja) 2006-07-20
JP2006191029A5 JP2006191029A5 (https=) 2008-11-13
JP5043333B2 true JP5043333B2 (ja) 2012-10-10

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JP2005363874A Expired - Fee Related JP5043333B2 (ja) 2005-01-07 2005-12-16 親水性Ｓｉ表面と界面接合酸化物の溶解とを用いるＳｉ間擬似疎水性ウェハ接合

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US (3) US8138061B2 (https=)
JP (1) JP5043333B2 (https=)
CN (1) CN1818154A (https=)
TW (1) TW200632992A (https=)

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US7670928B2 (en) * 2006-06-14 2010-03-02 Intel Corporation Ultra-thin oxide bonding for S1 to S1 dual orientation bonding
JP2008060355A (ja) * 2006-08-31 2008-03-13 Sumco Corp 貼り合わせウェーハの製造方法および貼り合わせウェーハ
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WO2008078132A1 (en) * 2006-12-26 2008-07-03 S.O.I.Tec Silicon On Insulator Technologies Method for producing a semiconductor-on-insulator structure
SG144092A1 (en) * 2006-12-26 2008-07-29 Sumco Corp Method of manufacturing bonded wafer
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JP5009124B2 (ja) * 2007-01-04 2012-08-22 コバレントマテリアル株式会社 半導体基板の製造方法
FR2911430B1 (fr) * 2007-01-15 2009-04-17 Soitec Silicon On Insulator "procede de fabrication d'un substrat hybride"
WO2008096194A1 (en) 2007-02-08 2008-08-14 S.O.I.Tec Silicon On Insulator Technologies Method of fabrication of highly heat dissipative substrates
JP5256625B2 (ja) * 2007-03-05 2013-08-07 株式会社Ｓｕｍｃｏ 貼り合わせウェーハの評価方法
JP5433927B2 (ja) * 2007-03-14 2014-03-05 株式会社Ｓｕｍｃｏ 貼り合わせウェーハの製造方法
WO2008114099A1 (en) 2007-03-19 2008-09-25 S.O.I.Tec Silicon On Insulator Technologies Patterned thin soi
FR2918792B1 (fr) * 2007-07-10 2010-04-23 Soitec Silicon On Insulator Procede de traitement de defauts d'interface dans un substrat.
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DE112008003726B4 (de) 2008-02-20 2023-09-21 Soitec Oxidation nach Oxidauflösung
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FR2933234B1 (fr) * 2008-06-30 2016-09-23 S O I Tec Silicon On Insulator Tech Substrat bon marche a structure double et procede de fabrication associe
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FR2933233B1 (fr) * 2008-06-30 2010-11-26 Soitec Silicon On Insulator Substrat de haute resistivite bon marche et procede de fabrication associe
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FR2936356B1 (fr) * 2008-09-23 2010-10-22 Soitec Silicon On Insulator Procede de dissolution locale de la couche d'oxyde dans une structure de type semi-conducteur sur isolant
FR2938120B1 (fr) * 2008-10-31 2011-04-08 Commissariat Energie Atomique Procede de formation d'une couche monocristalline dans le domaine micro-electronique
JP5493345B2 (ja) * 2008-12-11 2014-05-14 信越半導体株式会社 Ｓｏｉウェーハの製造方法
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US20130049175A1 (en) * 2011-08-25 2013-02-28 Aeroflex Colorado Springs Inc. Wafer structure for electronic integrated circuit manufacturing
US9378956B2 (en) 2011-08-25 2016-06-28 Aeroflex Colorado Springs Inc. Wafer structure for electronic integrated circuit manufacturing
US9589801B2 (en) 2011-10-31 2017-03-07 Arizona Board Of Regents, A Body Corporated Of The State Of Arizona, Acting For And On Behalf Of Arizona State University Methods for wafer bonding and for nucleating bonding nanophases using wet and steam pressurization
CN102586886A (zh) * 2012-03-10 2012-07-18 天津市环欧半导体材料技术有限公司 一种用于去除硅晶片表面氧沉积物的硅晶片退火方法
WO2014052476A2 (en) 2012-09-25 2014-04-03 Arizona Board Of Regents, A Body Corporate Of The State Of Arizona, Acting For And On... Methods for wafer bonding, and for nucleating bonding nanophases
FR3007891B1 (fr) * 2013-06-28 2016-11-25 Soitec Silicon On Insulator Procede de fabrication d'une structure composite
JP6061251B2 (ja) * 2013-07-05 2017-01-18 株式会社豊田自動織機 半導体基板の製造方法
US9601368B2 (en) * 2015-07-16 2017-03-21 Infineon Technologies Ag Semiconductor device comprising an oxygen diffusion barrier and manufacturing method
US9741685B2 (en) * 2015-08-07 2017-08-22 Lam Research Corporation Methods for directly bonding silicon to silicon or silicon carbide to silicon carbide
FR3057705B1 (fr) * 2016-10-13 2019-04-12 Soitec Procede de dissolution d'un oxyde enterre dans une plaquette de silicium sur isolant
EP3586356B1 (de) * 2017-02-21 2023-11-08 EV Group E. Thallner GmbH Verfahren zum bonden von substraten

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US7285473B2 (en) 2005-01-07 2007-10-23 International Business Machines Corporation Method for fabricating low-defect-density changed orientation Si
US8138061B2 (en) 2005-01-07 2012-03-20 International Business Machines Corporation Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide

Also Published As

Publication number Publication date
US20060154442A1 (en) 2006-07-13
US8138061B2 (en) 2012-03-20
CN1818154A (zh) 2006-08-16
US20090298258A1 (en) 2009-12-03
JP2006191029A (ja) 2006-07-20
US8053330B2 (en) 2011-11-08
US20120156861A1 (en) 2012-06-21
TW200632992A (en) 2006-09-16

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