CN1818154A - 用于减小两个接合硅表面之间的界面氧化物的厚度的方法 - Google Patents

用于减小两个接合硅表面之间的界面氧化物的厚度的方法 Download PDF

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Publication number
CN1818154A
CN1818154A CNA2006100004455A CN200610000445A CN1818154A CN 1818154 A CN1818154 A CN 1818154A CN A2006100004455 A CNA2006100004455 A CN A2006100004455A CN 200610000445 A CN200610000445 A CN 200610000445A CN 1818154 A CN1818154 A CN 1818154A
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CN
China
Prior art keywords
oxide
annealing
gas
silicon
bonding
Prior art date
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Pending
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CNA2006100004455A
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English (en)
Chinese (zh)
Inventor
J·P·德索萨
J·A·奥特
A·雷茨尼采克
D·K·萨丹那
K·L·森格尔
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International Business Machines Corp
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International Business Machines Corp
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Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of CN1818154A publication Critical patent/CN1818154A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Element Separation (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
CNA2006100004455A 2005-01-07 2006-01-05 用于减小两个接合硅表面之间的界面氧化物的厚度的方法 Pending CN1818154A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/031,165 2005-01-07
US11/031,165 US8138061B2 (en) 2005-01-07 2005-01-07 Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide

Publications (1)

Publication Number Publication Date
CN1818154A true CN1818154A (zh) 2006-08-16

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Application Number Title Priority Date Filing Date
CNA2006100004455A Pending CN1818154A (zh) 2005-01-07 2006-01-05 用于减小两个接合硅表面之间的界面氧化物的厚度的方法

Country Status (4)

Country Link
US (3) US8138061B2 (https=)
JP (1) JP5043333B2 (https=)
CN (1) CN1818154A (https=)
TW (1) TW200632992A (https=)

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CN102586886A (zh) * 2012-03-10 2012-07-18 天津市环欧半导体材料技术有限公司 一种用于去除硅晶片表面氧沉积物的硅晶片退火方法
CN101548369B (zh) * 2006-12-26 2012-07-18 硅绝缘体技术有限公司 制造绝缘体上半导体结构的方法
CN106449379A (zh) * 2015-08-07 2017-02-22 朗姆研究公司 用于直接键合硅与硅或碳化硅与碳化硅的方法
CN108682623A (zh) * 2011-01-25 2018-10-19 Ev 集团 E·索尔纳有限责任公司 用于永久接合晶片的方法
CN109844911A (zh) * 2016-10-13 2019-06-04 索泰克公司 用于在绝缘体上硅晶圆中溶解埋置氧化物的方法

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US7285473B2 (en) * 2005-01-07 2007-10-23 International Business Machines Corporation Method for fabricating low-defect-density changed orientation Si
US7670928B2 (en) * 2006-06-14 2010-03-02 Intel Corporation Ultra-thin oxide bonding for S1 to S1 dual orientation bonding
JP2008060355A (ja) * 2006-08-31 2008-03-13 Sumco Corp 貼り合わせウェーハの製造方法および貼り合わせウェーハ
FR2910177B1 (fr) * 2006-12-18 2009-04-03 Soitec Silicon On Insulator Couche tres fine enterree
WO2008078133A1 (en) * 2006-12-26 2008-07-03 S.O.I.Tec Silicon On Insulator Technologies Method for producing a semiconductor-on-insulator structure
SG144092A1 (en) * 2006-12-26 2008-07-29 Sumco Corp Method of manufacturing bonded wafer
JP5038723B2 (ja) * 2007-01-04 2012-10-03 コバレントマテリアル株式会社 半導体基板およびその製造方法
JP5009124B2 (ja) * 2007-01-04 2012-08-22 コバレントマテリアル株式会社 半導体基板の製造方法
FR2911430B1 (fr) * 2007-01-15 2009-04-17 Soitec Silicon On Insulator "procede de fabrication d'un substrat hybride"
WO2008096194A1 (en) 2007-02-08 2008-08-14 S.O.I.Tec Silicon On Insulator Technologies Method of fabrication of highly heat dissipative substrates
JP5256625B2 (ja) * 2007-03-05 2013-08-07 株式会社Ｓｕｍｃｏ 貼り合わせウェーハの評価方法
JP5433927B2 (ja) * 2007-03-14 2014-03-05 株式会社Ｓｕｍｃｏ 貼り合わせウェーハの製造方法
WO2008114099A1 (en) 2007-03-19 2008-09-25 S.O.I.Tec Silicon On Insulator Technologies Patterned thin soi
FR2918792B1 (fr) * 2007-07-10 2010-04-23 Soitec Silicon On Insulator Procede de traitement de defauts d'interface dans un substrat.
US20100193899A1 (en) * 2007-11-23 2010-08-05 S.O.I.Tec Silicon On Insulator Technologies Precise oxide dissolution
EP2065921A1 (en) * 2007-11-29 2009-06-03 S.O.I.T.E.C. Silicon on Insulator Technologies Method for fabricating a semiconductor substrate with areas with different crystal orienation
US7858495B2 (en) * 2008-02-04 2010-12-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
DE112008003726B4 (de) 2008-02-20 2023-09-21 Soitec Oxidation nach Oxidauflösung
WO2009128776A1 (en) * 2008-04-15 2009-10-22 Vallin Oerjan Hybrid wafers with hybrid-oriented layer
FR2933234B1 (fr) * 2008-06-30 2016-09-23 S O I Tec Silicon On Insulator Tech Substrat bon marche a structure double et procede de fabrication associe
FR2933235B1 (fr) * 2008-06-30 2010-11-26 Soitec Silicon On Insulator Substrat bon marche et procede de fabrication associe
FR2933233B1 (fr) * 2008-06-30 2010-11-26 Soitec Silicon On Insulator Substrat de haute resistivite bon marche et procede de fabrication associe
US20100178750A1 (en) * 2008-07-17 2010-07-15 Sumco Corporation Method for producing bonded wafer
JP2010072209A (ja) * 2008-09-17 2010-04-02 Fuji Xerox Co Ltd 静電荷像現像用トナー、静電荷像現像用トナーの製造方法、静電荷像現像用現像剤および画像形成装置
FR2936356B1 (fr) * 2008-09-23 2010-10-22 Soitec Silicon On Insulator Procede de dissolution locale de la couche d'oxyde dans une structure de type semi-conducteur sur isolant
FR2938120B1 (fr) * 2008-10-31 2011-04-08 Commissariat Energie Atomique Procede de formation d'une couche monocristalline dans le domaine micro-electronique
JP5493345B2 (ja) * 2008-12-11 2014-05-14 信越半導体株式会社 Ｓｏｉウェーハの製造方法
FR2941324B1 (fr) * 2009-01-22 2011-04-29 Soitec Silicon On Insulator Procede de dissolution de la couche d'oxyde dans la couronne d'une structure de type semi-conducteur sur isolant.
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
FR2964495A1 (fr) * 2010-09-02 2012-03-09 Soitec Silicon On Insulator Procede de fabrication d'une structure seoi multiple comportant une couche isolante ultrafine
FR2968450A1 (fr) * 2010-12-07 2012-06-08 Soitec Silicon On Insulator Procede de traitement d'une structure de type semi-conducteur sur isolant
FR2972564B1 (fr) 2011-03-08 2016-11-04 S O I Tec Silicon On Insulator Tech Procédé de traitement d'une structure de type semi-conducteur sur isolant
US9396947B2 (en) 2011-08-25 2016-07-19 Aeroflex Colorado Springs Inc. Wafer structure for electronic integrated circuit manufacturing
US20130049178A1 (en) * 2011-08-25 2013-02-28 Aeroflex Colorado Springs Inc. Wafer structure for electronic integrated circuit manufacturing
US9312133B2 (en) 2011-08-25 2016-04-12 Aeroflex Colorado Springs Inc. Wafer structure for electronic integrated circuit manufacturing
US9378955B2 (en) 2011-08-25 2016-06-28 Aeroflex Colorado Springs Inc. Wafer structure for electronic integrated circuit manufacturing
US20130049175A1 (en) * 2011-08-25 2013-02-28 Aeroflex Colorado Springs Inc. Wafer structure for electronic integrated circuit manufacturing
US9378956B2 (en) 2011-08-25 2016-06-28 Aeroflex Colorado Springs Inc. Wafer structure for electronic integrated circuit manufacturing
US9589801B2 (en) 2011-10-31 2017-03-07 Arizona Board Of Regents, A Body Corporated Of The State Of Arizona, Acting For And On Behalf Of Arizona State University Methods for wafer bonding and for nucleating bonding nanophases using wet and steam pressurization
WO2014052476A2 (en) 2012-09-25 2014-04-03 Arizona Board Of Regents, A Body Corporate Of The State Of Arizona, Acting For And On... Methods for wafer bonding, and for nucleating bonding nanophases
FR3007891B1 (fr) * 2013-06-28 2016-11-25 Soitec Silicon On Insulator Procede de fabrication d'une structure composite
JP6061251B2 (ja) * 2013-07-05 2017-01-18 株式会社豊田自動織機 半導体基板の製造方法
US9601368B2 (en) * 2015-07-16 2017-03-21 Infineon Technologies Ag Semiconductor device comprising an oxygen diffusion barrier and manufacturing method
EP3586356B1 (de) * 2017-02-21 2023-11-08 EV Group E. Thallner GmbH Verfahren zum bonden von substraten

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JP3175323B2 (ja) * 1991-08-26 2001-06-11 株式会社デンソー 半導体基板の製造方法
JP2820120B2 (ja) * 1996-06-03 1998-11-05 日本電気株式会社 半導体基板の製造方法
JP4273540B2 (ja) * 1998-07-21 2009-06-03 株式会社Ｓｕｍｃｏ 貼り合わせ半導体基板及びその製造方法
JP2004031715A (ja) * 2002-06-27 2004-01-29 Shin Etsu Handotai Co Ltd Ｓｏｉウエーハの製造方法及びｓｏｉウエーハ
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US7023055B2 (en) 2003-10-29 2006-04-04 International Business Machines Corporation CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding
US20050116290A1 (en) 2003-12-02 2005-06-02 De Souza Joel P. Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers
US7285473B2 (en) 2005-01-07 2007-10-23 International Business Machines Corporation Method for fabricating low-defect-density changed orientation Si
US8138061B2 (en) 2005-01-07 2012-03-20 International Business Machines Corporation Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101548369B (zh) * 2006-12-26 2012-07-18 硅绝缘体技术有限公司 制造绝缘体上半导体结构的方法
CN108682623A (zh) * 2011-01-25 2018-10-19 Ev 集团 E·索尔纳有限责任公司 用于永久接合晶片的方法
CN108682623B (zh) * 2011-01-25 2022-09-27 Ev 集团 E·索尔纳有限责任公司 用于永久接合晶片的方法
CN102586886A (zh) * 2012-03-10 2012-07-18 天津市环欧半导体材料技术有限公司 一种用于去除硅晶片表面氧沉积物的硅晶片退火方法
CN106449379A (zh) * 2015-08-07 2017-02-22 朗姆研究公司 用于直接键合硅与硅或碳化硅与碳化硅的方法
CN106449379B (zh) * 2015-08-07 2022-03-11 朗姆研究公司 用于直接键合硅与硅或碳化硅与碳化硅的方法
CN109844911A (zh) * 2016-10-13 2019-06-04 索泰克公司 用于在绝缘体上硅晶圆中溶解埋置氧化物的方法
CN109844911B (zh) * 2016-10-13 2023-03-24 索泰克公司 用于在绝缘体上硅晶圆中溶解埋置氧化物的方法

Also Published As

Publication number Publication date
US20060154442A1 (en) 2006-07-13
US8138061B2 (en) 2012-03-20
US20090298258A1 (en) 2009-12-03
JP2006191029A (ja) 2006-07-20
US8053330B2 (en) 2011-11-08
US20120156861A1 (en) 2012-06-21
TW200632992A (en) 2006-09-16
JP5043333B2 (ja) 2012-10-10

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