JP5027365B2 - 低抵抗ソース領域と高ソース結合を持つフローティングゲートメモリセルの半導体メモリアレイを形成する自己整合方法、及びそれにより作られたメモリアレイ - Google Patents
低抵抗ソース領域と高ソース結合を持つフローティングゲートメモリセルの半導体メモリアレイを形成する自己整合方法、及びそれにより作られたメモリアレイ Download PDFInfo
- Publication number
- JP5027365B2 JP5027365B2 JP2001284734A JP2001284734A JP5027365B2 JP 5027365 B2 JP5027365 B2 JP 5027365B2 JP 2001284734 A JP2001284734 A JP 2001284734A JP 2001284734 A JP2001284734 A JP 2001284734A JP 5027365 B2 JP5027365 B2 JP 5027365B2
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- JP
- Japan
- Prior art keywords
- layer
- forming
- region
- conductive material
- floating gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/031—Manufacture or treatment of data-storage electrodes
- H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
Landscapes
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (12)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US23431400P | 2000-09-20 | 2000-09-20 | |
| US60/234314 | 2000-09-20 | ||
| US24209600P | 2000-10-19 | 2000-10-19 | |
| US60/242096 | 2000-10-19 | ||
| US26016701P | 2001-01-05 | 2001-01-05 | |
| US27551701P | 2001-03-12 | 2001-03-12 | |
| US28704701P | 2001-04-26 | 2001-04-26 | |
| US60/260167 | 2001-07-26 | ||
| US60/287047 | 2001-07-26 | ||
| US09/916,555 US6727545B2 (en) | 2000-09-20 | 2001-07-26 | Semiconductor memory array of floating gate memory cells with low resistance source regions and high source coupling |
| US09/916555 | 2001-07-26 | ||
| US60/275517 | 2001-07-26 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002158302A JP2002158302A (ja) | 2002-05-31 |
| JP2002158302A5 JP2002158302A5 (enExample) | 2008-09-04 |
| JP5027365B2 true JP5027365B2 (ja) | 2012-09-19 |
Family
ID=27559246
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001284734A Expired - Lifetime JP5027365B2 (ja) | 2000-09-20 | 2001-09-19 | 低抵抗ソース領域と高ソース結合を持つフローティングゲートメモリセルの半導体メモリアレイを形成する自己整合方法、及びそれにより作られたメモリアレイ |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US6727545B2 (enExample) |
| EP (1) | EP1191586A2 (enExample) |
| JP (1) | JP5027365B2 (enExample) |
| KR (1) | KR100855885B1 (enExample) |
| CN (1) | CN1222992C (enExample) |
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| KR100455379B1 (ko) * | 2002-02-21 | 2004-11-06 | 삼성전자주식회사 | 플래시 메모리 장치의 제조방법 |
| US6734055B1 (en) * | 2002-11-15 | 2004-05-11 | Taiwan Semiconductor Manufactoring Company | Multi-level (4 state/2-bit) stacked gate flash memory cell |
| KR100823694B1 (ko) * | 2002-11-21 | 2008-04-21 | 삼성전자주식회사 | 불휘발성 메모리 장치의 플로팅 게이트 구조물의 형성 방법 |
| KR100481871B1 (ko) * | 2002-12-20 | 2005-04-11 | 삼성전자주식회사 | 플로팅 게이트를 갖는 비휘발성 기억 셀 및 그 형성방법 |
| US6706599B1 (en) * | 2003-03-20 | 2004-03-16 | Motorola, Inc. | Multi-bit non-volatile memory device and method therefor |
| US7183163B2 (en) * | 2003-04-07 | 2007-02-27 | Silicon Storage Technology, Inc. | Method of manufacturing an isolation-less, contact-less array of bi-directional read/program non-volatile floating gate memory cells with independent controllable control gates |
| US7613041B2 (en) * | 2003-06-06 | 2009-11-03 | Chih-Hsin Wang | Methods for operating semiconductor device and semiconductor memory device |
| US7759719B2 (en) * | 2004-07-01 | 2010-07-20 | Chih-Hsin Wang | Electrically alterable memory cell |
| US7550800B2 (en) * | 2003-06-06 | 2009-06-23 | Chih-Hsin Wang | Method and apparatus transporting charges in semiconductor device and semiconductor memory device |
| US7105406B2 (en) * | 2003-06-20 | 2006-09-12 | Sandisk Corporation | Self aligned non-volatile memory cell and process for fabrication |
| US7009244B2 (en) * | 2003-07-02 | 2006-03-07 | Integrated Memory Technologies, Inc. | Scalable flash EEPROM memory cell with notched floating gate and graded source region |
| US6890821B2 (en) * | 2003-07-11 | 2005-05-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and system for forming source regions in memory devices |
| US6911704B2 (en) * | 2003-10-14 | 2005-06-28 | Advanced Micro Devices, Inc. | Memory cell array with staggered local inter-connect structure |
| US6960506B2 (en) * | 2003-11-13 | 2005-11-01 | Macronix International Co., Ltd. | Method of fabricating a memory device having a self-aligned contact |
| DE10356285A1 (de) | 2003-11-28 | 2005-06-30 | Infineon Technologies Ag | Integrierter Halbleiterspeicher und Verfahren zum Herstellen eines integrierten Halbleiterspeichers |
| KR100526478B1 (ko) * | 2003-12-31 | 2005-11-08 | 동부아남반도체 주식회사 | 반도체 소자 및 그 제조방법 |
| US7315056B2 (en) * | 2004-06-07 | 2008-01-01 | Silicon Storage Technology, Inc. | Semiconductor memory array of floating gate memory cells with program/erase and select gates |
| US20080203464A1 (en) * | 2004-07-01 | 2008-08-28 | Chih-Hsin Wang | Electrically alterable non-volatile memory and array |
| KR100591768B1 (ko) * | 2004-07-12 | 2006-06-26 | 삼성전자주식회사 | 메모리 소자들 및 그 형성 방법들 |
| JP2006032950A (ja) * | 2004-07-12 | 2006-02-02 | Samsung Electronics Co Ltd | メモリ素子及びその形成方法 |
| KR100621553B1 (ko) | 2004-09-22 | 2006-09-19 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조방법 |
| JP2006093707A (ja) * | 2004-09-22 | 2006-04-06 | Samsung Electronics Co Ltd | 半導体素子及びその製造方法 |
| KR100598047B1 (ko) * | 2004-09-30 | 2006-07-07 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조 방법 |
| KR100645063B1 (ko) * | 2005-03-14 | 2006-11-10 | 삼성전자주식회사 | 비휘발성 기억장치 및 그 제조방법 |
| US7411244B2 (en) * | 2005-06-28 | 2008-08-12 | Chih-Hsin Wang | Low power electrically alterable nonvolatile memory cells and arrays |
| US7265013B2 (en) * | 2005-09-19 | 2007-09-04 | International Business Machines Corporation | Sidewall image transfer (SIT) technologies |
| CN100446186C (zh) * | 2006-10-09 | 2008-12-24 | 上海华虹Nec电子有限公司 | 用于分栅结构闪存的浮栅制作方法 |
| US8138524B2 (en) | 2006-11-01 | 2012-03-20 | Silicon Storage Technology, Inc. | Self-aligned method of forming a semiconductor memory array of floating memory cells with source side erase, and a memory array made thereby |
| US7641226B2 (en) * | 2006-11-01 | 2010-01-05 | Autoliv Development Ab | Side airbag module with an internal guide fin |
| US8072023B1 (en) | 2007-11-12 | 2011-12-06 | Marvell International Ltd. | Isolation for non-volatile memory cell array |
| US8120088B1 (en) | 2007-12-07 | 2012-02-21 | Marvell International Ltd. | Non-volatile memory cell and array |
| CN101770991B (zh) * | 2010-01-12 | 2013-12-04 | 上海宏力半导体制造有限公司 | 分栅型埋入式浮栅的非易失性存储器及其制造方法 |
| CN101777519B (zh) * | 2010-01-12 | 2013-09-25 | 上海宏力半导体制造有限公司 | 分栅型非易失性存储器及其制造方法 |
| DE102011000818A1 (de) * | 2011-02-18 | 2012-08-23 | United Monolithic Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements |
| US8711636B2 (en) | 2011-05-13 | 2014-04-29 | Silicon Storage Technology, Inc. | Method of operating a split gate flash memory cell with coupling gate |
| CN103579362B (zh) * | 2012-07-30 | 2018-03-27 | 联华电子股份有限公司 | 半导体装置及其制作方法 |
| US20140110777A1 (en) | 2012-10-18 | 2014-04-24 | United Microelectronics Corp. | Trench gate metal oxide semiconductor field effect transistor and fabricating method thereof |
| CN102983080B (zh) * | 2012-12-26 | 2017-02-08 | 上海华虹宏力半导体制造有限公司 | 改进分栅存储器的擦除及编程性能的方法 |
| US9379121B1 (en) * | 2015-01-05 | 2016-06-28 | Silicon Storage Technology, Inc. | Split gate non-volatile flash memory cell having metal gates and method of making same |
| US10141321B2 (en) * | 2015-10-21 | 2018-11-27 | Silicon Storage Technology, Inc. | Method of forming flash memory with separate wordline and erase gates |
| CN107305892B (zh) * | 2016-04-20 | 2020-10-02 | 硅存储技术公司 | 使用两个多晶硅沉积步骤来形成三栅极非易失性闪存单元对的方法 |
| CN110010606B (zh) | 2018-01-05 | 2023-04-07 | 硅存储技术公司 | 衬底沟槽中具有浮栅的双位非易失性存储器单元 |
| CN110021602B (zh) | 2018-01-05 | 2023-04-07 | 硅存储技术公司 | 在专用沟槽中具有浮栅的非易失性存储器单元 |
| US10418451B1 (en) * | 2018-05-09 | 2019-09-17 | Silicon Storage Technology, Inc. | Split-gate flash memory cell with varying insulation gate oxides, and method of forming same |
| US10838652B2 (en) | 2018-08-24 | 2020-11-17 | Silicon Storage Technology, Inc. | Programming of memory cell having gate capacitively coupled to floating gate |
| US10998325B2 (en) | 2018-12-03 | 2021-05-04 | Silicon Storage Technology, Inc. | Memory cell with floating gate, coupling gate and erase gate, and method of making same |
| CN112185970B (zh) * | 2019-07-02 | 2024-05-28 | 硅存储技术公司 | 形成分裂栅存储器单元的方法 |
| CN112185815B (zh) | 2019-07-04 | 2024-07-23 | 硅存储技术公司 | 形成分裂栅闪存存储器单元的方法 |
| US10991433B2 (en) | 2019-09-03 | 2021-04-27 | Silicon Storage Technology, Inc. | Method of improving read current stability in analog non-volatile memory by limiting time gap between erase and program |
| US11309042B2 (en) | 2020-06-29 | 2022-04-19 | Silicon Storage Technology, Inc. | Method of improving read current stability in analog non-volatile memory by program adjustment for memory cells exhibiting random telegraph noise |
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-
2001
- 2001-07-26 US US09/916,555 patent/US6727545B2/en not_active Expired - Lifetime
- 2001-09-19 EP EP01307993A patent/EP1191586A2/en not_active Withdrawn
- 2001-09-19 CN CNB011385049A patent/CN1222992C/zh not_active Expired - Lifetime
- 2001-09-19 JP JP2001284734A patent/JP5027365B2/ja not_active Expired - Lifetime
- 2001-09-20 KR KR1020010058313A patent/KR100855885B1/ko not_active Expired - Lifetime
-
2003
- 2003-10-20 US US10/690,204 patent/US6855980B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR20020022630A (ko) | 2002-03-27 |
| US20040084717A1 (en) | 2004-05-06 |
| US6855980B2 (en) | 2005-02-15 |
| US20020034849A1 (en) | 2002-03-21 |
| US6727545B2 (en) | 2004-04-27 |
| CN1222992C (zh) | 2005-10-12 |
| JP2002158302A (ja) | 2002-05-31 |
| KR100855885B1 (ko) | 2008-09-03 |
| EP1191586A2 (en) | 2002-03-27 |
| CN1362736A (zh) | 2002-08-07 |
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