JP4926692B2 - 配線基板及びその製造方法と半導体装置 - Google Patents

配線基板及びその製造方法と半導体装置 Download PDF

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Publication number
JP4926692B2
JP4926692B2 JP2006351000A JP2006351000A JP4926692B2 JP 4926692 B2 JP4926692 B2 JP 4926692B2 JP 2006351000 A JP2006351000 A JP 2006351000A JP 2006351000 A JP2006351000 A JP 2006351000A JP 4926692 B2 JP4926692 B2 JP 4926692B2
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Japan
Prior art keywords
wiring board
wiring
base
resin
silicon interposer
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Active
Application number
JP2006351000A
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English (en)
Japanese (ja)
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JP2008166327A5 (https=
JP2008166327A (ja
Inventor
直 荒井
敏男 小林
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2006351000A priority Critical patent/JP4926692B2/ja
Priority to TW096141679A priority patent/TW200832673A/zh
Priority to US11/984,004 priority patent/US7901986B2/en
Priority to CNA2007103011690A priority patent/CN101211888A/zh
Publication of JP2008166327A publication Critical patent/JP2008166327A/ja
Publication of JP2008166327A5 publication Critical patent/JP2008166327A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
JP2006351000A 2006-12-27 2006-12-27 配線基板及びその製造方法と半導体装置 Active JP4926692B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2006351000A JP4926692B2 (ja) 2006-12-27 2006-12-27 配線基板及びその製造方法と半導体装置
TW096141679A TW200832673A (en) 2006-12-27 2007-11-05 Wiring substrate, manufacturing method thereof, and semiconductor device
US11/984,004 US7901986B2 (en) 2006-12-27 2007-11-13 Wiring substrate, manufacturing method thereof, and semiconductor device
CNA2007103011690A CN101211888A (zh) 2006-12-27 2007-12-26 布线基板及其制造方法以及半导体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006351000A JP4926692B2 (ja) 2006-12-27 2006-12-27 配線基板及びその製造方法と半導体装置

Publications (3)

Publication Number Publication Date
JP2008166327A JP2008166327A (ja) 2008-07-17
JP2008166327A5 JP2008166327A5 (https=) 2009-12-10
JP4926692B2 true JP4926692B2 (ja) 2012-05-09

Family

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JP2006351000A Active JP4926692B2 (ja) 2006-12-27 2006-12-27 配線基板及びその製造方法と半導体装置

Country Status (4)

Country Link
US (1) US7901986B2 (https=)
JP (1) JP4926692B2 (https=)
CN (1) CN101211888A (https=)
TW (1) TW200832673A (https=)

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US20090277670A1 (en) * 2008-05-10 2009-11-12 Booth Jr Roger A High Density Printed Circuit Board Interconnect and Method of Assembly
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JP5352437B2 (ja) 2009-11-30 2013-11-27 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
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US9059187B2 (en) * 2010-09-30 2015-06-16 Ibiden Co., Ltd. Electronic component having encapsulated wiring board and method for manufacturing the same
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US20120292777A1 (en) * 2011-05-18 2012-11-22 Lotz Jonathan P Backside Power Delivery Using Die Stacking
US20130154106A1 (en) 2011-12-14 2013-06-20 Broadcom Corporation Stacked Packaging Using Reconstituted Wafers
US9548251B2 (en) 2012-01-12 2017-01-17 Broadcom Corporation Semiconductor interposer having a cavity for intra-interposer die
US20130187284A1 (en) 2012-01-24 2013-07-25 Broadcom Corporation Low Cost and High Performance Flip Chip Package
US8587132B2 (en) 2012-02-21 2013-11-19 Broadcom Corporation Semiconductor package including an organic substrate and interposer having through-semiconductor vias
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DE102012202826A1 (de) * 2012-02-24 2013-08-29 Robert Bosch Gmbh Stromsensor zur Befestigung an einer Stromschiene
US8749072B2 (en) 2012-02-24 2014-06-10 Broadcom Corporation Semiconductor package with integrated selectively conductive film interposer
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US9275976B2 (en) 2012-02-24 2016-03-01 Broadcom Corporation System-in-package with integrated socket
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Also Published As

Publication number Publication date
CN101211888A (zh) 2008-07-02
US7901986B2 (en) 2011-03-08
US20080155820A1 (en) 2008-07-03
TW200832673A (en) 2008-08-01
JP2008166327A (ja) 2008-07-17

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