TW200832673A - Wiring substrate, manufacturing method thereof, and semiconductor device - Google Patents

Wiring substrate, manufacturing method thereof, and semiconductor device Download PDF

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Publication number
TW200832673A
TW200832673A TW096141679A TW96141679A TW200832673A TW 200832673 A TW200832673 A TW 200832673A TW 096141679 A TW096141679 A TW 096141679A TW 96141679 A TW96141679 A TW 96141679A TW 200832673 A TW200832673 A TW 200832673A
Authority
TW
Taiwan
Prior art keywords
wiring board
wiring
interposer
unit
resin portion
Prior art date
Application number
TW096141679A
Other languages
English (en)
Chinese (zh)
Inventor
Tadashi Arai
Toshio Kobayashi
Original Assignee
Shinko Electric Ind Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Ind Co filed Critical Shinko Electric Ind Co
Publication of TW200832673A publication Critical patent/TW200832673A/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
TW096141679A 2006-12-27 2007-11-05 Wiring substrate, manufacturing method thereof, and semiconductor device TW200832673A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006351000A JP4926692B2 (ja) 2006-12-27 2006-12-27 配線基板及びその製造方法と半導体装置

Publications (1)

Publication Number Publication Date
TW200832673A true TW200832673A (en) 2008-08-01

Family

ID=39581929

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096141679A TW200832673A (en) 2006-12-27 2007-11-05 Wiring substrate, manufacturing method thereof, and semiconductor device

Country Status (4)

Country Link
US (1) US7901986B2 (https=)
JP (1) JP4926692B2 (https=)
CN (1) CN101211888A (https=)
TW (1) TW200832673A (https=)

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US10459007B2 (en) 2013-11-04 2019-10-29 Via Technologies, Inc. Probe card
US12080563B2 (en) 2019-12-27 2024-09-03 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices and methods of manufacturing
TWI871403B (zh) * 2019-12-27 2025-02-01 台灣積體電路製造股份有限公司 半導體器件及其製造方法

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US20090277670A1 (en) * 2008-05-10 2009-11-12 Booth Jr Roger A High Density Printed Circuit Board Interconnect and Method of Assembly
KR20100037300A (ko) * 2008-10-01 2010-04-09 삼성전자주식회사 내장형 인터포저를 갖는 반도체장치의 형성방법
WO2011033601A1 (ja) * 2009-09-21 2011-03-24 株式会社 東芝 ３次元集積回路製造方法、及び装置
US8592973B2 (en) * 2009-10-16 2013-11-26 Stats Chippac Ltd. Integrated circuit packaging system with package-on-package stacking and method of manufacture thereof
JP5352437B2 (ja) 2009-11-30 2013-11-27 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8581394B2 (en) 2010-06-21 2013-11-12 Samsung Electro-Mechanics Co., Ltd Semiconductor package module and electric circuit assembly with the same
US9059187B2 (en) * 2010-09-30 2015-06-16 Ibiden Co., Ltd. Electronic component having encapsulated wiring board and method for manufacturing the same
KR101719636B1 (ko) * 2011-01-28 2017-04-05 삼성전자 주식회사 반도체 장치 및 그 제조 방법
US20120292777A1 (en) * 2011-05-18 2012-11-22 Lotz Jonathan P Backside Power Delivery Using Die Stacking
US20130154106A1 (en) 2011-12-14 2013-06-20 Broadcom Corporation Stacked Packaging Using Reconstituted Wafers
US9548251B2 (en) 2012-01-12 2017-01-17 Broadcom Corporation Semiconductor interposer having a cavity for intra-interposer die
US20130187284A1 (en) 2012-01-24 2013-07-25 Broadcom Corporation Low Cost and High Performance Flip Chip Package
US8587132B2 (en) 2012-02-21 2013-11-19 Broadcom Corporation Semiconductor package including an organic substrate and interposer having through-semiconductor vias
US8558395B2 (en) 2012-02-21 2013-10-15 Broadcom Corporation Organic interface substrate having interposer with through-semiconductor vias
DE102012202826A1 (de) * 2012-02-24 2013-08-29 Robert Bosch Gmbh Stromsensor zur Befestigung an einer Stromschiene
US8749072B2 (en) 2012-02-24 2014-06-10 Broadcom Corporation Semiconductor package with integrated selectively conductive film interposer
US8872321B2 (en) 2012-02-24 2014-10-28 Broadcom Corporation Semiconductor packages with integrated heat spreaders
US9275976B2 (en) 2012-02-24 2016-03-01 Broadcom Corporation System-in-package with integrated socket
US8928128B2 (en) 2012-02-27 2015-01-06 Broadcom Corporation Semiconductor package with integrated electromagnetic shielding
US9368458B2 (en) 2013-07-10 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Die-on-interposer assembly with dam structure and method of manufacturing the same
WO2015029951A1 (ja) 2013-08-26 2015-03-05 日立金属株式会社 実装基板用ウエハ、多層セラミックス基板、実装基板、チップモジュール、及び実装基板用ウエハの製造方法
US12068231B2 (en) * 2014-05-24 2024-08-20 Broadpak Corporation 3D integrations and methods of making thereof
JP2016058596A (ja) * 2014-09-11 2016-04-21 ソニー株式会社 電子デバイス、部品実装基板及び電子機器
TWI566305B (zh) * 2014-10-29 2017-01-11 巨擘科技股份有限公司 製造三維積體電路的方法
US9971970B1 (en) * 2015-04-27 2018-05-15 Rigetti & Co, Inc. Microwave integrated quantum circuits with VIAS and methods for making the same
US9859202B2 (en) * 2015-06-24 2018-01-02 Dyi-chung Hu Spacer connector
EP3376537A4 (en) * 2015-11-11 2019-04-17 KYOCERA Corporation PACKAGING FOR AN ELECTRONIC COMPONENT
FR3044864B1 (fr) * 2015-12-02 2018-01-12 Valeo Systemes De Controle Moteur Dispositif electrique et procede d'assemblage d'un tel dispositif electrique
US10181447B2 (en) 2017-04-21 2019-01-15 Invensas Corporation 3D-interconnect
US10687419B2 (en) 2017-06-13 2020-06-16 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US11121301B1 (en) 2017-06-19 2021-09-14 Rigetti & Co, Inc. Microwave integrated quantum circuits with cap wafers and their methods of manufacture
US11281608B2 (en) * 2017-12-11 2022-03-22 Micron Technology, Inc. Translation system for finer grain memory architectures
KR102661196B1 (ko) * 2019-11-08 2024-04-29 삼성전자 주식회사 적층형 기판을 포함하는 전자 장치
US20220069489A1 (en) * 2020-08-28 2022-03-03 Unimicron Technology Corp. Circuit board structure and manufacturing method thereof
US11540396B2 (en) * 2020-08-28 2022-12-27 Unimicron Technology Corp. Circuit board structure and manufacturing method thereof
CN111933590B (zh) * 2020-09-11 2021-01-01 甬矽电子(宁波)股份有限公司 封装结构和封装结构制作方法
CN113270327B (zh) * 2021-07-20 2021-12-07 珠海越亚半导体股份有限公司 主被动器件垂直叠层嵌埋封装结构及其制作方法
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10459007B2 (en) 2013-11-04 2019-10-29 Via Technologies, Inc. Probe card
US12080563B2 (en) 2019-12-27 2024-09-03 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices and methods of manufacturing
TWI871403B (zh) * 2019-12-27 2025-02-01 台灣積體電路製造股份有限公司 半導體器件及其製造方法

Also Published As

Publication number Publication date
JP4926692B2 (ja) 2012-05-09
CN101211888A (zh) 2008-07-02
US7901986B2 (en) 2011-03-08
US20080155820A1 (en) 2008-07-03
JP2008166327A (ja) 2008-07-17

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