JP4446891B2 - 垂直積層ポア相変化メモリ - Google Patents
垂直積層ポア相変化メモリ Download PDFInfo
- Publication number
- JP4446891B2 JP4446891B2 JP2004560263A JP2004560263A JP4446891B2 JP 4446891 B2 JP4446891 B2 JP 4446891B2 JP 2004560263 A JP2004560263 A JP 2004560263A JP 2004560263 A JP2004560263 A JP 2004560263A JP 4446891 B2 JP4446891 B2 JP 4446891B2
- Authority
- JP
- Japan
- Prior art keywords
- phase change
- layer
- change material
- bottom electrode
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Patterning of the switching material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
- H10N70/8413—Electrodes adapted for resistive heating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8828—Tellurides, e.g. GeSbTe
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/008—Write by generating heat in the surroundings of the memory material, e.g. thermowrite
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/50—Resistive cell structure aspects
- G11C2213/52—Structure characterized by the electrode material, shape, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/13—Hollow or container type article [e.g., tube, vase, etc.]
Description
絶縁体、
該絶縁体上の相変化材料、
該相変化材料に結合された底部電極であって、低抵抗層の上部に高抵抗層を有する底部電極、
とを有する相変化メモリが提供される。
第1の層および第2の層を有する底部電極を形成するステップであって、前記第2の層は、前記第1の層より高い抵抗率を有する、ステップと、
前記第2の層の上部に相変化材料を形成するステップと、
を有する方法が提供される。
孔部を定形する絶縁層と、
前記孔部に設置された相変化材料と、
前記相変化材料と接続するように前記孔部の底部に設置された底部電極と、
を有する相変化メモリであって、前記底部電極は第1および第2の層を有し、前記第1の層は前記相変化材料と接続され、前記第2の層よりも高い抵抗率を有することを特徴とする、相変化メモリが提供される。
Claims (12)
- 相変化材料、および
該相変化材料に結合された底部電極であって、低抵抗層の上部に高抵抗層を有する底部電極、
を有する相変化メモリであって、
前記底部電極は、相変化材料を含まず、前記低抵抗層は、前記高抵抗層よりも薄く、
前記高抵抗層は、前記相変化材料と隣接する箇所を加熱する役割を有することを特徴とする相変化メモリ。 - 前記高抵抗層は、前記相変化材料に接続されることを特徴とする請求項1に記載のメモリ。
- 前記低抵抗層に接続されたカップ状導体を有することを特徴とする請求項1または2に記載のメモリ。
- 前記相変化材料の層と前記底部電極の間に絶縁体を有し、該絶縁体内には孔部が形成されることを特徴とする請求項1乃至3のいずれか一つに記載のメモリ。
- 第1の層および第2の層を有する底部電極を形成するステップであって、前記第2の層は、前記第1の層より高い抵抗率を有する、ステップと、
前記第2の層の上部に相変化材料を形成するステップと、
を有し、
前記底部電極は、相変化材料を含まず、前記第1の層は、前記第2の層よりも薄く、
前記第2の層は、前記相変化材料と隣接する箇所を加熱する役割を有することを特徴とする方法。 - 前記第1の層を導体と接続させるステップを有することを特徴とする請求項5に記載の方法。
- 前記底部電極の上部に絶縁体を形成するステップおよび前記絶縁体に孔部を形成するステップを有することを特徴とする請求項5または6に記載の方法。
- 前記孔部内に、前記底部電極と接続された前記相変化材料を形成するステップを有することを特徴とする請求項7に記載の方法。
- 前記孔部よりも幅の広い底部電極を形成するステップを有することを特徴とする請求項8に記載の方法。
- 孔部を定形する絶縁層と、
前記孔部に設置された相変化材料と、
前記相変化材料と接続するように前記孔部の底部に設置された底部電極と、
を有する相変化メモリであって、前記底部電極は第1および第2の層を有し、前記第1の層は前記相変化材料と接続され、前記第2の層よりも高い抵抗率を有し、
前記底部電極は、相変化材料を含まず、前記第2の層は、前記第1の層よりも薄く、
前記第1の層は、前記相変化材料と隣接する箇所を加熱する役割を有することを特徴とする、相変化メモリ。 - 前記第2の層に接続されたカップ状導体を有することを特徴とする請求項10に記載のメモリ。
- 前記底部電極は、前記孔部より幅が広いことを特徴とする請求項10または11に記載のメモリ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/319,179 US7049623B2 (en) | 2002-12-13 | 2002-12-13 | Vertical elevated pore phase change memory |
PCT/US2003/013360 WO2004055915A2 (en) | 2002-12-13 | 2003-04-28 | Vertical elevated pore phase change memory |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2006510219A JP2006510219A (ja) | 2006-03-23 |
JP2006510219A5 JP2006510219A5 (ja) | 2009-05-14 |
JP4446891B2 true JP4446891B2 (ja) | 2010-04-07 |
Family
ID=32506588
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004560263A Expired - Fee Related JP4446891B2 (ja) | 2002-12-13 | 2003-04-28 | 垂直積層ポア相変化メモリ |
Country Status (8)
Country | Link |
---|---|
US (2) | US7049623B2 (ja) |
JP (1) | JP4446891B2 (ja) |
KR (1) | KR100669312B1 (ja) |
CN (1) | CN1714461B (ja) |
AU (1) | AU2003225226A1 (ja) |
MY (1) | MY135245A (ja) |
TW (1) | TWI286750B (ja) |
WO (1) | WO2004055915A2 (ja) |
Families Citing this family (47)
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KR100668823B1 (ko) * | 2004-06-30 | 2007-01-16 | 주식회사 하이닉스반도체 | 상변환 기억 소자 및 그 제조방법 |
KR100623181B1 (ko) * | 2004-08-23 | 2006-09-19 | 삼성전자주식회사 | 상변화 메모리 장치 및 이의 제조 방법 |
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-
2002
- 2002-12-13 US US10/319,179 patent/US7049623B2/en not_active Expired - Lifetime
-
2003
- 2003-04-28 AU AU2003225226A patent/AU2003225226A1/en not_active Abandoned
- 2003-04-28 CN CN03825591.XA patent/CN1714461B/zh not_active Expired - Lifetime
- 2003-04-28 JP JP2004560263A patent/JP4446891B2/ja not_active Expired - Fee Related
- 2003-04-28 KR KR1020057010563A patent/KR100669312B1/ko active IP Right Grant
- 2003-04-28 WO PCT/US2003/013360 patent/WO2004055915A2/en active Application Filing
- 2003-05-09 TW TW092112708A patent/TWI286750B/zh not_active IP Right Cessation
- 2003-05-21 MY MYPI20031877A patent/MY135245A/en unknown
-
2005
- 2005-11-10 US US11/270,909 patent/US7364937B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR20050085526A (ko) | 2005-08-29 |
JP2006510219A (ja) | 2006-03-23 |
US7364937B2 (en) | 2008-04-29 |
US7049623B2 (en) | 2006-05-23 |
AU2003225226A1 (en) | 2004-07-09 |
WO2004055915A3 (en) | 2004-08-26 |
WO2004055915A2 (en) | 2004-07-01 |
TW200410245A (en) | 2004-06-16 |
US20040115372A1 (en) | 2004-06-17 |
MY135245A (en) | 2008-03-31 |
CN1714461B (zh) | 2010-12-08 |
TWI286750B (en) | 2007-09-11 |
US20060054878A1 (en) | 2006-03-16 |
KR100669312B1 (ko) | 2007-01-16 |
CN1714461A (zh) | 2005-12-28 |
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